8000 ports/renesas-ra/boards/VK-RA6M3: New Board. · micropython/micropython@4d1d833 · GitHub
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mbedNoobNinjambedNoobNinja
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ports/renesas-ra/boards/VK-RA6M3: New Board.
ports/renesas-ra/boards: New processor RA6M3. ports/renesas-ra: Integration to the existing RA family. Signed-off-by: mbedNoobNinja <novoltage@gmail.com>
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‎ports/renesas-ra/Makefile

Lines changed: 104 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,12 @@ include $(BOARD_DIR)/mpconfigboard.mk
2525

2626
USE_FSP_LPM ?= 1
2727
USE_FSP_QSPI ?= 0
28+
USE_FSP_SDHI ?= 0
29+
USE_FSP_ETH ?= 0
30+
USE_FSP_SCE ?= 0
31+
USE_FSP_LCD ?= 0
32+
USE_FSP_CAM ?= 0
33+
#USE_FSP_CAN ?= 0
2834
FSP_BOARD_NAME ?= $(shell echo $(BOARD) | tr '[:upper:]' '[:lower:]')
2935

3036
# Files that are generated and needed before the QSTR build.
@@ -68,9 +74,22 @@ INC += -I$(TOP)/$(HAL_DIR)
6874
INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/inc
6975
INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/inc/api
7076
INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/inc/instances
77+
ifeq ($(CMSIS_MCU),RA6M3)
78+
INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/private/inc
79+
INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/public/inc
80+
INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/primitive
81+
INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/src/r_sce/common
82+
INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/src/r_sce
83+
endif
84+
ifeq ($(CMSIS_MCU),RA6M5)
85+
INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce7/inc/api
86+
INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce7/inc/instances
87+
INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce7/private/inc
88+
endif
7189
INC += -I$(TOP)/$(HAL_DIR)/ra/fsp/src/bsp/cmsis/Device/RENESAS/Include
72-
#INC += -Ilwip_inc
73-
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA4M1 RA4W1 RA6M1 RA6M2 RA6M5))
90+
INC += -Ilwip_inc
91+
INC += -Imbedtls
92+
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA4M1 RA4W1 RA6M1 RA6M2 RA6M3 RA6M5))
7493
INC += -Ira
7594
endif
7695
INC += -I$(BOARD_DIR)/ra_gen
@@ -104,6 +123,7 @@ CFLAGS_MCU_RA4M1 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
104123
CFLAGS_MCU_RA4W1 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
105124
CFLAGS_MCU_RA6M1 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
106125
CFLAGS_MCU_RA6M2 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
126+
CFLAGS_MCU_RA6M3 = $(CFLAGS_CORTEX_M) -mtune=cortex-m4 -mcpu=cortex-m4
107127
CFLAGS_MCU_RA6M5 = $(CFLAGS_CORTEX_M) -mtune=cortex-m33 -mcpu=cortex-m33
108128

109129
ASFLAGS += $(CFLAGS_CORTEX_M) -mcpu=cortex-$(MCU_SERIES)
@@ -279,6 +299,7 @@ SRC_C += \
279299
ra_hal.c \
280300
ra_it.c \
281301
mphalport.c \
302+
mpnetworkport.c \
282303
mpthreadport.c \
283304
irq.c \
284305
pendsv.c \
@@ -300,7 +321,12 @@ SRC_C += \
300321
machine_pin.c \
301322
machine_rtc.c \
302323
machine_sdcard.c \
324+
machine_lcd.c \
325+
machine_cam.c \
303326
modmachine.c \
327+
network_lan.c \
328+
eth.c \
329+
rng.c \
304330
extint.c \
305331
usrsw.c \
306332
flash.c \
@@ -356,6 +382,74 @@ HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_sdhi/r_sdhi.c \
356382
$(HAL_DIR)/ra/fsp/src/r_dtc/r_dtc.c
357383
endif
358384

385+
ifeq ($(USE_FSP_ETH), 1)
386+
CFLAGS += -DUSE_FSP_ETH
387+
HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_ether_phy/targets/ICS1894/r_ether_phy_target_ics1894.c \
388+
$(HAL_DIR)/ra/fsp/src/r_ether_phy/r_ether_phy.c \
389+
$(HAL_DIR)/ra/fsp/src/r_ether/r_ether.c
390+
endif
391+
392+
ifeq ($(USE_FSP_SCE), 1)
393+
CFLAGS += -DUSE_FSP_SCE
394+
ifeq ($(CMSIS_MCU),RA6M3)
395+
HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/adaptors/r_sce_adapt.c \
396+
$(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/primitive/hw_sce_p_p00.c \
397+
$(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/primitive/hw_sce_p_p01.c \
398+
$(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/primitive/hw_sce_p_p02.c \
399+
$(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/primitive/hw_sce_p_p20.c \
400+
$(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/primitive/hw_sce_p_func050.c \
401+
$(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/primitive/hw_sce_p_func051.c \
402+
$(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/primitive/hw_sce_p_func052.c \
403+
$(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/primitive/hw_sce_p_func053.c \
404+
$(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/primitive/hw_sce_p_func054.c \
405+
$(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/primitive/hw_sce_p_func100.c \
406+
$(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/primitive/hw_sce_p_func101.c \
407+
$(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/primitive/hw_sce_p_func102.c \
408+
$(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/primitive/hw_sce_p_func103.c \
409+
$(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/primitive/hw_sce_p_subprc01.c \
410+
$(HAL_DIR)/ra/fsp/src/r_sce/crypto_procedures/src/sce7/plainkey/primitive/hw_sce_p_subprc02.c
411+
endif
412+
ifeq ($(CMSIS_MCU),RA6M5)
413+
HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/public/r_sce.c \
414+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/public/r_sce_aes.c \
415+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/public/r_sce_sha.c \
416+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/public/r_sce_ecc.c \
417+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/private/r_sce_private.c \
418+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p00.c \
419+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p20.c \
420+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p26.c \
421+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p40.c \
422+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p81.c \
423+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p82.c \
424+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_p92.c \
425+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func040.c \
426+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func048.c \
427+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func050.c \
428+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func051.c \
429+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func052.c \
430+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func053.c \
431+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func054.c \
432+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func100.c \
433+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func101.c \
434+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func102.c \
435+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_func103.c \
436+
$(HAL_DIR)/ra/fsp/src/r_sce_protected/crypto_procedures_protected/src/sce9/primitive/r_sce_subprc01.c
437+
endif
438+
endif
439+
440+
ifeq ($(USE_FSP_LCD), 1)
441+
CFLAGS += -DUSE_FSP_LCD
442+
HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_glcdc/r_glcdc.c \
443+
$(HAL_DIR)/ra/fsp/src/r_sci_i2c/r_sci_i2c.c \
444+
$(HAL_DIR)/ra/fsp/src/r_icu/r_icu.c
445+
endif
446+
447+
ifeq ($(USE_FSP_CAM), 1)
448+
CFLAGS += -DUSE_FSP_CAM
449+
HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_pdc/r_pdc.c \
450+
$(HAL_DIR)/ra/fsp/src/r_jpeg/r_jpeg.c
451+
endif
452+
359453
ifeq ($(USE_FSP_LPM), 1)
360454
CFLAGS += -DUSE_FSP_LPM
361455
HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_lpm/r_lpm.c
@@ -368,14 +462,14 @@ HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_flash_lp/r_flash_lp.c
368462
endif
369463
endif
370464

371-
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA6M1 RA6M2 RA6M5))
465+
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA6M1 RA6M2 RA6M3 RA6M5))
372466
ifeq ($(USE_FSP_FLASH), 1)
373467
CFLAGS += -DUSE_FSP_FLASH
374468
HAL_SRC_C += $(HAL_DIR)/ra/fsp/src/r_flash_hp/r_flash_hp.c
375469
endif
376470
endif
377471

378-
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA4M1 RA4W1 RA6M1 RA6M2 RA6M5))
472+
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA4M1 RA4W1 RA6M1 RA6M2 RA6M3 RA6M5))
379473
HAL_SRC_C += $(addprefix ra/,\
380474
ra_adc.c \
381475
ra_dac.c \
@@ -392,7 +486,10 @@ HAL_SRC_C += $(addprefix ra/,\
392486
ra_gpt.c \
393487
ra_utils.c \
394488
)
489+
endif
395490

491+
ifeq ($(MICROPY_SSL_MBEDTLS),1)
492+
LIB_SRC_C += mbedtls/mbedtls_port.c
396493
endif
397494

398495
OBJ += $(PY_O)
@@ -485,6 +582,9 @@ endif
485582
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA6M2))
486583
AF_FILE = boards/ra6m2_af.csv
487584
endif
585+
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA6M3))
586+
AF_FILE = boards/ra6m3_af.csv
587+
endif
488588
ifeq ($(CMSIS_MCU),$(filter $(CMSIS_MCU),RA6M5))
489589
AF_FILE = boards/ra6m5_af.csv
490590
endif

‎ports/renesas-ra/RA6M3_hal.h

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Original file line numberDiff line numberDiff line change
@@ -0,0 +1,109 @@
1+
/*
2+
* The MIT License (MIT)
3+
*
4+
* Copyright (c) 2021 Renesas Electronics Corporation
5+
* Copyright (c) 2023 Vekatech Ltd.
6+
*
7+
* Permission is hereby granted, free of charge, to any person obtaining a copy
8+
* of this software and associated documentation files (the "Software"), to deal
9+
* in the Software without restriction, including without limitation the rights
10+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11+
* copies of the Software, and to permit persons to whom the Software is
12+
* furnished to do so, subject to the following conditions:
13+
*
14+
* The above copyright notice and this permission notice shall be included in
15+
* all copies or substantial portions of the Software.
16+
*
17+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
20+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23+
* THE SOFTWARE.
24+
*/
25+
26+
#ifndef PORTS_RA_RA6M3_HAL_H_
27+
#define PORTS_RA_RA6M3_HAL_H_
28+
29+
#include <stdio.h>
30+
#include <stdint.h>
31+
#include <stdbool.h>
32+
// #include "hal_data.h"
33+
#include "bsp_api.h"
34+
#include "common_data.h"
35+
#if defined(USE_DBG_PRINT)
36+
#include RA_CFG_H
37+
#endif
38+
39+
#define SCI_CH DEFAULT_DBG_CH
40+
#define SCI_BAUD 115200
41+
#define UART_CH SCI_CH
42+
#define UART_TxStr sci_tx_str
43+
#define PCLK 120000000
44+
45+
#define RA_PRI_SYSTICK (0)
46+
#define RA_PRI_UART (1)
47+
#define RA_PRI_SDIO (4)
48+
#define RA_PRI_DMA (5)
49+
#define RA_PRI_FLASH (6)
50+
#define RA_PRI_OTG_FS (6)
51+
#define RA_PRI_OTG_HS (6)
52+
#define RA_PRI_TIM5 (6)
53+
#define RA_PRI_CAN (7)
54+
#define RA_PRI_SPI (8)
55+
#define RA_PRI_I2C (8)
56+
#define RA_PRI_TIMX (13)
57+
#define RA_PRI_EXTINT (14)
58+
#define RA_PRI_PENDSV (15)
59+
#define RA_PRI_RTC_WKUP (15)
60+
61+
#include "ra_config.h"
62+
#include "ra_adc.h"
63+
#include "ra_dac.h"
64+
#include "ra_flash.h"
65+
#include "ra_gpio.h"
66+
#include "ra_gpt.h"
67+
#include "ra_i2c.h"
68+
#include "ra_icu.h"
69+
#include "ra_init.h"
70+
#include "ra_int.h"
71+
#include "ra_rtc.h"
72+
#include "ra_sci.h"
73+
#include "ra_spi.h"
74+
#include "ra_timer.h"
75+
#include "ra_utils.h"
76+
77+
typedef enum {
78+
HAL_OK = 0x00,
79+
HAL_ERROR = 0x01,
80+
HAL_BUSY = 0x02,
81+
HAL_TIMEOUT = 0x03
82+
} HAL_StatusTypeDef;
83+
84+
#define __IO volatile
85+
86+
#if defined(USE_DBG_PRINT)
87+
#if !defined(DEBUG_CH)
88+
#define DEBUG_CH SCI_CH
89+
#endif
90+
#if (DEBUG_CH == 7)
91+
#define DEBUG_TX_PIN P613
92+
#define DEBUG_RX_PIN P614
93+
#endif
94+
#if (DEBUG_CH == 8)
95+
#define DEBUG_TX_PIN P105
96+
#define DEBUG_RX_PIN P104
97+
#endif
98+
#if (DEBUG_CH == 9)
99+
#define DEBUG_TX_PIN P109
100+
#define DEBUG_RX_PIN P110
101+
#endif
102+
#define DEBUG_TXSTR(s) ra_sci_tx_str(DEBUG_CH, (unsigned char *)s)
103+
#define DEBUG_TXCH(c) ra_sci_tx_ch(DEBUG_CH, c)
104+
#else
105+
#define DEBUG_TXSTR(s)
106+
#define DEBUG_TXCH(c)
107+
#endif
108+
109+
#endif /* PORTS_RA_RA6M3_HAL_H_ */

‎ports/renesas-ra/boards/VK_RA6M3/README.md

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1+
In case you need to debug something in `VK_RA6M3` board, make sure the contents of
2+
[project repo](https://github.com/Vekatech/VK_RA6M3) is cloned in to **this** directory.

‎ports/renesas-ra/boards/VK_RA6M3/board.json

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{
2+
"deploy": [
3+
"../deploy.md"
4+
],
5+
"docs": "https://vekatech.com/VK-RA6M3_docs/brochures/VK-RA6M3%20Flyer%20R2.pdf",
6+
"features": [
7+
"UART",
8+
"SPI",
9+
"I2C",
10+
"ADC",
11+
"DAC",
12+
"PWM",
13+
"SDCard",
14+
"Ethernet"
15+
],
16+
"id": "VK-RA6M3",
17+
"images": [
18+
"VK-RA6M3.jpg"
19+
],
20+
"mcu": "RA6M3",
21+
"product": "VK-RA6M3",
22+
"thumbnail": "",
23+
"url": "https://vekatech.com",
24+
"vendor": "Vekatech"
25+
}

‎ports/renesas-ra/boards/VK_RA6M3/manifest.py

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1+
include("$(PORT_DIR)/boards/manifest.py")
2+
# Networking
3+
require("bundle-networking")

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