8000 [AMDGPU] Handle unset/max flat workgroup size in waves/EU · llvm/llvm-project@c40eaae · GitHub
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[AMDGPU] Handle unset/max flat workgroup size in waves/EU
When `amdgpu-flat-work-group-size` is either missed or set to maximum allowed [1, 1024], attributor won't change the state, which later results to `FlatWorkGroupSize != 0` assertion.
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2 files changed

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‎llvm/lib/Target/AMDGPU/AMDGPUAttributor.cpp

Lines changed: 8 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1170,13 +1170,19 @@ struct AAAMDWavesPerEU : public AAAMDSizeRangeAttribute {
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!AssumedGroupSize->isValidState())
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return false;
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unsigned MinFWGSize =
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AssumedGroupSize->getAssumed().getLower().getZExtValue();
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unsigned MaxFWGSize =
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AssumedGroupSize->getAssumed().getUpper().getZExtValue();
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if (MinFWGSize == 0 && MaxFWGSize == 0)
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std::tie(MinFWGSize, MaxFWGSize) =
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InfoCache.getDefaultFlatWorkGroupSize(*Func);
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unsigned Min, Max;
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std::tie(Min, Max) = InfoCache.getEffectiveWavesPerEU(
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*Caller,
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{CallerInfo->getAssumed().getLower().getZExtValue(),
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CallerInfo->getAssumed().getUpper().getZExtValue() - 1},
1178-
{AssumedGroupSize->getAssumed().getLower().getZExtValue(),
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AssumedGroupSize->getAssumed().getUpper().getZExtValue() - 1});
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{MinFWGSize, MaxFWGSize - 1});
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ConstantRange CallerRange(APInt(32, Min), APInt(32, Max + 1));
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IntegerRangeState CallerRangeState(CallerRange);
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Change |= clampStateAndIndicateChange(this->getState(), CallerRangeState);

‎llvm/test/CodeGen/AMDGPU/amdgpu-attributor-max-flat-wgs.ll

Lines changed: 35 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,35 @@
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; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -mcpu=gfx942 -passes=amdgpu-attributor %s | FileCheck %s
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; CHECK-LABEL: define internal fastcc void @call1(
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; CHECK-SAME: ) #[[ATTR0:[0-9]+]]
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define internal fastcc void @call1() #0 {
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tail call fastcc void @call2()
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ret void
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}
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; CHECK-LABEL: define internal fastcc void @call2(
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; CHECK-SAME: ) #[[ATTR0]]
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define internal fastcc void @call2() #1 {
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tail call fastcc void @call5()
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ret void
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}
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; CHECK-LABEL: define { ptr addrspace(1), ptr } @call3(
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; CHECK-SAME:) #[[ATTR0]]
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define { ptr addrspace(1), ptr } @call3() #2 {
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tail call fastcc void @call5()
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ret { ptr addrspace(1), ptr } zeroinitializer
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}
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; CHECK-LABEL: define internal fastcc void @call5(
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; CHECK-SAME: ) #[[ATTR0]]
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define internal fastcc void @call5() {
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tail call fastcc void @call1()
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ret void
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}
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attributes #0 = {"amdgpu-flat-work-group-size"="1, 1024" "target-cpu"="gfx942" }
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attributes #1 = {"amdgpu-flat-work-group-size"="1, 1024" "target-cpu"="gfx942" }
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attributes #2 = {"amdgpu-flat-work-group-size"="1, 256" "target-cpu"="gfx942" }
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; CHECK: attributes #[[ATTR0]] = { "amdgpu-agpr-alloc"="0" "amdgpu-flat-work-group-size"="1,256" "amdgpu-no-completion-action" "amdgpu-no-default-queue" "amdgpu-no-dispatch-id" "amdgpu-no-dispatch-ptr" "amdgpu-no-flat-scratch-init" "amdgpu-no-heap-ptr" "amdgpu-no-hostcall-ptr" "amdgpu-no-implicitarg-ptr" "amdgpu-no-lds-kernel-id" "amdgpu-no-multigrid-sync-arg" "amdgpu-no-queue-ptr" "amdgpu-no-workgroup-id-x" "amdgpu-no-workgroup-id-y" "amdgpu-no-workgroup-id-z" "amdgpu-no-workitem-id-x" "amdgpu-no-workitem-id-y" "amdgpu-no-workitem-id-z" "target-cpu"="gfx942" "uniform-work-group-size"="false" }

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