8000 stm32/boards: Enable MICROPY_HW_RTC_USE_LSE on L4 boards. · jimmo/micropython@26e90a0 · GitHub
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stm32/boards: Enable MICROPY_HW_RTC_USE_LSE on L4 boards.
The previous commit changed the default configuration on L4 MCUs to use LSI, so configure these boards to use LSE again.
1 parent 266146a commit 26e90a0

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5 files changed

+15
-3
lines changed

5 files changed

+15
-3
lines changed

‎ports/stm32/boards/B_L475E_IOT01A/mpconfigboard.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -12,9 +12,11 @@
1212
#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV7)
1313
#define MICROPY_HW_CLK_PLLR (RCC_PLLR_DIV2)
1414
#define MICROPY_HW_CLK_PLLQ (RCC_PLLQ_DIV4)
15-
1615
#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_4
1716

17+
// The board has an external 32kHz crystal
18+
#define MICROPY_HW_RTC_USE_LSE (1)
19+
1820
// USART1 config connected to ST-Link
1921
#define MICROPY_HW_UART1_TX (pin_B6)
2022
#define MICROPY_HW_UART1_RX (pin_B7)

‎ports/stm32/boards/LIMIFROG/mpconfigboard.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -16,9 +16,11 @@ void LIMIFROG_board_early_init(void);
1616
#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV7)
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#define MICROPY_HW_CLK_PLLR (RCC_PLLR_DIV2)
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#define MICROPY_HW_CLK_PLLQ (RCC_PLLQ_DIV2)
19-
2019
#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_4
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21+
// The board has an external 32kHz crystal
22+
#define MICROPY_HW_RTC_USE_LSE (1)
23+
2224
// USART config
2325
#define MICROPY_HW_UART3_TX (pin_C10)
2426
#define MICROPY_HW_UART3_RX (pin_C11)

‎ports/stm32/boards/NUCLEO_L432KC/mpconfigboard.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,9 @@
2525
#define MICROPY_HW_CLK_PLLP (7)
2626
#define MICROPY_HW_CLK_PLLQ (2)
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28+
// The board has an external 32kHz crystal
29+
#define MICROPY_HW_RTC_USE_LSE (1)
30+
2831
// UART config
2932
#define MICROPY_HW_UART1_TX (pin_B6)
3033
#define MICROPY_HW_UART1_RX (pin_B7)

‎ports/stm32/boards/NUCLEO_L476RG/mpconfigboard.h

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -15,6 +15,9 @@
1515
#define MICROPY_HW_CLK_PLLQ (RCC_PLLQ_DIV2)
1616
#define MICROPY_HW_CLK_PLLR (RCC_PLLR_DIV2)
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18+
// The board has an external 32kHz crystal
19+
#define MICROPY_HW_RTC_USE_LSE (1)
20+
1821
// UART config
1922
#define MICROPY_HW_UART2_TX (pin_A2)
2023
#define MICROPY_HW_UART2_RX (pin_A3)

‎ports/stm32/boards/STM32L496GDISC/mpconfigboard.h

Lines changed: 3 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -14,9 +14,11 @@
1414
#define MICROPY_HW_CLK_PLLP (RCC_PLLP_DIV7)
1515
#define MICROPY_HW_CLK_PLLR (RCC_PLLR_DIV2)
1616
#define MICROPY_HW_CLK_PLLQ (RCC_PLLQ_DIV2)
17-
1817
#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_4
1918

19+
// The board has an external 32kHz crystal
20+
#define MICROPY_HW_RTC_USE_LSE (1)
21+
2022
// USART config
2123
#define MICROPY_HW_UART2_TX (pin_A2)
2224
#define MICROPY_HW_UART2_RX (pin_D6)

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