8000 stm32/{adc,machine_adc}: Change ADC clock and sampling time for F0 MCUs. · jimmo/micropython@0096041 · GitHub
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chrismas9dpgeorge
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stm32/{adc,machine_adc}: Change ADC clock and sampling time for F0 MCUs.
STM32F0 has PCLK=48MHz and maximum ADC clock is 14MHz so use PCLK/4=12MHz to stay within spec of the ADC peripheral. In pyb.ADC set common sampling time to approx 4uS for internal and external sources. In machine.ADC reduce sample time to approx 1uS for external source, leave internal at maximum sampling time.
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+10
-8
lines changed

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+10
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lines changed

‎ports/stm32/adc.c

Lines changed: 8 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -241,7 +241,13 @@ STATIC void adcx_init_periph(ADC_HandleTypeDef *adch, uint32_t resolution) {
241241
adch->Init.EOCSelection = ADC_EOC_SINGLE_CONV;
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adch->Init.ExternalTrigConv = ADC_SOFTWARE_START;
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adch->Init.ExternalTrigConvEdge = ADC_EXTERNALTRIGCONVEDGE_NONE;
244-
#if defined(STM32F0) || defined(STM32F4) || defined(STM32F7)
244+
#if defined(STM32F0)
245+
adch->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV4; // 12MHz
246+
adch->Init.ScanConvMode = DISABLE;
247+
adch->Init.DataAlign = ADC_DATAALIGN_RIGHT;
248+
adch->Init.DMAContinuousRequests = DISABLE;
249+
adch->Init.SamplingTimeCommon = ADC_SAMPLETIME_55CYCLES_5; // ~4uS
250+
#elif defined(STM32F4) || defined(STM32F7)
245251
adch->Init.ClockPrescaler = ADC_CLOCK_SYNC_PCLK_DIV2;
246252
adch->Init.ScanConvMode = DISABLE;
247253
adch->Init.DataAlign = ADC_DATAALIGN_RIGHT;
@@ -266,10 +272,6 @@ STATIC void adcx_init_periph(ADC_HandleTypeDef *adch, uint32_t resolution) {
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#error Unsupported processor
267273
#endif
268274

269-
#if defined(STM32F0)
270-
adch->Init.SamplingTimeCommon = ADC_SAMPLETIME_71CYCLES_5;
271-
#endif
272-
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HAL_ADC_Init(adch);
274276

275277
#if defined(STM32H7)
@@ -309,7 +311,7 @@ STATIC void adc_config_channel(ADC_HandleTypeDef *adc_handle, uint32_t channel)
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sConfig.Channel = channel;
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sConfig.Rank = 1;
311313
#if defined(STM32F0)
312-
sConfig.SamplingTime = ADC_SAMPLETIME_71CYCLES_5;
314+
sConfig.SamplingTime = ADC_SAMPLETIME_55CYCLES_5;
313315
#elif defined(STM32F4) || defined(STM32F7)
314316
sConfig.SamplingTime = ADC_SAMPLETIME_15CYCLES;
315317
#elif defined(STM32H7)

‎ports/stm32/machine_adc.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -49,7 +49,7 @@
4949
#endif
5050

5151
#if defined(STM32F0)
52-
#define ADC_SAMPLETIME_DEFAULT ADC_SAMPLETIME_71CYCLES_5
52+
#define ADC_SAMPLETIME_DEFAULT ADC_SAMPLETIME_13CYCLES_5
5353
#define ADC_SAMPLETIME_DEFAULT_INT ADC_SAMPLETIME_239CYCLES_5
5454
#elif defined(STM32F4) || defined(STM32F7)
5555
#define ADC_SAMPLETIME_DEFAULT ADC_SAMPLETIME_15CYCLES
@@ -126,7 +126,7 @@ STATIC void adc_config(ADC_TypeDef *adc, uint32_t bits) {
126126

127127
// Configure clock mode
128128
#if defined(STM32F0)
129-
adc->CFGR2 = 1 << ADC_CFGR2_CKMODE_Pos; // PCLK/2 (synchronous clock mode)
129+
adc->CFGR2 = 2 << ADC_CFGR2_CKMODE_Pos; // PCLK/4 (synchronous clock mode)
130130
#elif defined(STM32F4) || defined(STM32F7) || defined(STM32L4)
131131
ADCx_COMMON->CCR = 0; // ADCPR=PCLK/2
132132
#elif defined(STM32H7)

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