8000 Rework LSE clock init, allow clock overrides · jensechu/circuitpython@d14e344 · GitHub
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Rework LSE clock init, allow clock overrides
1 parent 75eb44f commit d14e344

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37 files changed

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lines changed

37 files changed

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-665
lines changed

‎ports/stm/Makefile

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -207,11 +207,11 @@ SRC_C += \
207207
mphalport.c \
208208
boards/$(BOARD)/board.c \
209209
boards/$(BOARD)/pins.c \
210+
peripherals/stm32$(MCU_SERIES_LOWER)/clocks.c \
210211
peripherals/stm32$(MCU_SERIES_LOWER)/$(MCU_VARIANT_LOWER)/pins.c \
211-
peripherals/stm32$(MCU_SERIES_LOWER)/$(MCU_VARIANT_LOWER)/clocks.c \
212212
peripherals/stm32$(MCU_SERIES_LOWER)/$(MCU_VARIANT_LOWER)/gpio.c \
213213
peripherals/stm32$(MCU_SERIES_LOWER)/$(MCU_VARIANT_LOWER)/periph.c \
214-
packages/$(MCU_PACKAGE).c\
214+
packages/$(MCU_PACKAGE).c \
215215
lib/libc/string0.c \
216216
lib/mp-readline/readline.c \
217217
lib/oofatfs/ff.c \

‎ports/stm/boards/espruino_pico/mpconfigboard.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -35,6 +35,7 @@
3535
#define AUTORESET_DELAY_MS (500)
3636
#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000)
3737

38-
#define BOARD_OSC_DIV (8)
38+
#define HSE_VALUE ((uint32_t)8000000)
39+
#define LSE_VALUE ((uint32_t)32768)
3940
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
4041

‎ports/stm/boards/espruino_wifi/mpconfigboard.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,7 @@
3232
#define FLASH_SIZE (0x80000) //512K
3333
#define FLASH_PAGE_SIZE (0x4000) //16K
3434

35-
#define BOARD_OSC_DIV (8)
35+
#define HSE_VALUE ((uint32_t)8000000)
36+
#define LSE_VALUE ((uint32_t)32768)
3637
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
3738
#define BOARD_OVERWRITE_SWD (1)

‎ports/stm/boards/feather_stm32f405_express/mpconfigboard.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -34,8 +34,8 @@
3434

3535
#define MICROPY_HW_NEOPIXEL (&pin_PC00)
3636

37-
#define BOARD_OSC_DIV (12)
38-
#define HSE_VALUE ((uint32_t)12000000U)
37+
#define HSE_VALUE ((uint32_t)12000000U)
38+
#define LSE_VALUE ((uint32_t)32768)
3939
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
4040

4141
// On-board flash

‎ports/stm/boards/meowbit_v121/mpconfigboard.h

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -35,10 +35,9 @@
3535
#define AUTORESET_DELAY_MS 500
3636
#define BOARD_FLASH_SIZE (FLASH_SIZE - 0x4000)
3737

38-
#define BOARD_OSC_DIV (12)
38+
#define HSE_VALUE ((uint32_t)12000000U)
39+
#define LSE_VALUE ((uint32_t)32000U)
3940
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
40-
#define HSE_VALUE ((uint32_t)12000000U)
41-
#define LSE_VALUE ((uint32_t)32000U)
4241

4342
#define BOARD_NO_VBUS_SENSE (1)
4443
#define BOARD_VTOR_DEFER (1) //Leave VTOR relocation to bootloader

‎ports/stm/boards/nucleo_f746zg/mpconfigboard.h

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -33,8 +33,10 @@
3333
#define FLASH_SIZE (0x100000)
3434
#define FLASH_PAGE_SIZE (0x4000)
3535

36-
#define BOARD_OSC_DIV (8)
37-
#define BOARD_HAS_LOW_SPEED_CRYSTAL (0) // TODO: enable this once LSE is fixed for H7/F7
36+
#define HSE_VALUE ((uint32_t)8000000)
37+
#define LSE_VALUE ((uint32_t)32768)
38+
#define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal
39+
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
3840

3941
#define DEBUG_UART_TX (&pin_PD08)
4042
#define DEBUG_UART_RX (&pin_PD09)

‎ports/stm/boards/nucleo_f767zi/mpconfigboard.h

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,5 +32,7 @@
3232
#define FLASH_SIZE (0x200000)
3333
#define FLASH_PAGE_SIZE (0x4000)
3434

35-
#define BOARD_OSC_DIV (8)
36-
#define BOARD_HAS_LOW_SPEED_CRYSTAL (0) // TODO: enable this once LSE is fixed for H7/F7
35+
#define HSE_VALUE ((uint32_t)8000000)
36+
#define LSE_VALUE ((uint32_t)32768)
37+
#define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal
38+
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)

‎ports/stm/boards/nucleo_h743zi_2/mpconfigboard.h

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,5 +31,7 @@
3131

3232
#define FLASH_PAGE_SIZE (0x4000)
3333

34-
#define BOARD_OSC_DIV (8)
35-
#define BOARD_HAS_LOW_SPEED_CRYSTAL (0) // TODO: enable this once LSE is fixed for H7/F7
34+
#define HSE_VALUE ((uint32_t)8000000)
35+
#define LSE_VALUE ((uint32_t)32768)
36+
#define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal
37+
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)

‎ports/stm/boards/openmv_h7/mpconfigboard.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -31,7 +31,6 @@
3131

3232
#define FLASH_PAGE_SIZE (0x4000)
3333

34-
#define BOARD_OSC_DIV (12)
35-
#define HSE_VALUE ((uint32_t)12000000)
34+
#define HSE_VALUE ((uint32_t)12000000)
3635
#define BOARD_HAS_LOW_SPEED_CRYSTAL (0)
3736

‎ports/stm/boards/pyb_nano_v2/mpconfigboard.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,7 +32,8 @@
3232
#define FLASH_SIZE (0x80000)
3333
#define FLASH_PAGE_SIZE (0x4000)
3434

35-
#define BOARD_OSC_DIV (8)
35+
#define HSE_VALUE ((uint32_t)8000000)
36+
#define LSE_VALUE ((uint32_t)32768)
3637
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
3738

3839
// On-board flash

‎ports/stm/boards/pyboard_v11/mpconfigboard.h

Lines changed: 2 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -32,10 +32,9 @@
3232
#define FLASH_SIZE (0x100000)
3333
#define FLASH_PAGE_SIZE (0x4000)
3434

35-
#define BOARD_OSC_DIV (12)
35+
#define HSE_VALUE ((uint32_t)12000000)
36+
#define LSE_VALUE ((uint32_t)32000U)
3637
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
37-
#define HSE_VALUE ((uint32_t)12000000U)
38-
#define LSE_VALUE ((uint32_t)32000U)
3938

4039
#define DEFAULT_I2C_BUS_SCL (&pin_PB06)
4140
#define DEFAULT_I2C_BUS_SDA (&pin_PB07)

‎ports/stm/boards/stm32f411ce_blackpill/mpconfigboard.h

Lines changed: 1 addition & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -32,11 +32,9 @@
3232
#define FLASH_SIZE (0x80000)
3333
#define FLASH_PAGE_SIZE (0x4000)
3434

35-
#define BOARD_OSC_DIV (25)
35+
#define HSE_VALUE ((uint32_t)25000000)
3636
#define BOARD_NO_VBUS_SENSE (1)
37-
3837
#define BOARD_HAS_LOW_SPEED_CRYSTAL (0)
39-
#define HSE_VALUE ((uint32_t)25000000U)
4038

4139
// On-board flash
4240
// #define SPI_FLASH_MOSI_PIN (&pin_PA07)

‎ports/stm/boards/stm32f411ve_discovery/mpconfigboard.h

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,8 +32,8 @@
3232
#define FLASH_SIZE (0x80000) //512K
3333
#define FLASH_PAGE_SIZE (0x4000) //16K
3434

35-
#define BOARD_OSC_DIV (8)
36-
35+
#define HSE_VALUE ((uint32_t)8000000)
36+
#define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal
3737
#define BOARD_HAS_LOW_SPEED_CRYSTAL (0)
3838

3939
// The schematic has a 32k crystal that isn't fitted. Uncommented the line below if you add it.

‎ports/stm/boards/stm32f412zg_discovery/mpconfigboard.h

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,8 +32,11 @@
3232
#define FLASH_SIZE (0x100000)
3333
#define FLASH_PAGE_SIZE (0x4000)
3434

35-
#define BOARD_OSC_DIV (8)
35+
#define HSE_VALUE ((uint32_t)8000000)
36+
#define LSE_VALUE ((uint32_t)32768)
37+
#define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal
3638
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
39+
#define CPY_CLK_USB_USES_AUDIOPLL (1)
3740

3841
#define DEFAULT_I2C_BUS_SCL (&pin_PB10)
3942
#define DEFAULT_I2C_BUS_SDA (&pin_PB09)

‎ports/stm/boards/stm32f4_discovery/mpconfigboard.h

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -32,5 +32,6 @@
3232
#define FLASH_SIZE (0x100000)
3333
#define FLASH_PAGE_SIZE (0x4000)
3434

35-
#define BOARD_OSC_DIV (8)
35+
#define HSE_VALUE ((uint32_t)8000000)
36+
#define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal
3637
#define BOARD_HAS_LOW_SPEED_CRYSTAL (0)

‎ports/stm/boards/stm32f746g_discovery/mpconfigboard.h

Lines changed: 9 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -34,12 +34,15 @@
3434
#define FLASH_SIZE (0x100000)
3535
#define FLASH_PAGE_SIZE (0x4000)
3636

37-
#define BOARD_OSC_DIV (25)
38-
#define HSE_VALUE ((uint32_t)25000000)
39-
#define BOARD_OSC_PLLN (400)
40-
#define BOARD_OSC_PLLQ (9)
37+
// Lower frequency to allow external RAM use
38+
#define HSE_VALUE ((uint32_t)25000000)
39+
#define LSE_VALUE ((uint32_t)32768)
40+
#define CPY_CLK_PLLN (400)
41+
#define CPY_CLK_PLLQ (9)
42+
#define CPY_CLK_FLASH_LATENCY (FLASH_LATENCY_6)
43+
#define CPY_CLK_USB_USES_AUDIOPLL (1)
4144

42-
#define BOARD_HAS_LOW_SPEED_CRYSTAL (0) // TODO: enable this once LSE is fixed for H7/F7
45+
#define BOARD_HSE_SOURCE (RCC_HSE_BYPASS) // ST boards use the STLink clock signal
46+
#define BOARD_HAS_LOW_SPEED_CRYSTAL (1)
4347

44-
#define BOARD_FLASH_LATENCY FLASH_LATENCY_6
4548
#define BOARD_NO_VBUS_SENSE 1

‎ports/stm/boards/thunderpack/mpconfigboard.h

Lines changed: 1 addition & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -40,12 +40,11 @@
4040
#define FLASH_PAGE_SIZE (0x4000)
4141
#define BOARD_FLASH_SIZE (FLASH_SIZE - CIRCUITPY_INTERNAL_NVM_SIZE- 0x2000 - 0xC000)
4242

43-
#define BOARD_OSC_DIV (24)
43+
#define HSE_VALUE ((uint32_t)24000000U)
4444
#define BOARD_OVERWRITE_SWD (1)
4545
#define BOARD_NO_VBUS_SENSE (1)
4646

4747
#define BOARD_HAS_LOW_SPEED_CRYSTAL (0)
48-
#define HSE_VALUE ((uint32_t)24000000U)
4948

5049
// Status LEDs
5150
#define MICROPY_HW_LED_STATUS (&pin_PA02)

‎ports/stm/peripherals/stm32f4/clocks.c

Lines changed: 120 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,120 @@
1+
/*
2+
* This file is part of the Micro Python project, http://micropython.org/
3+
*
4+
* The MIT License (MIT)
5+
*
6+
* Copyright (c) 2020 Lucian Copeland for Adafruit Industries
7+
*
8+
* Permission is hereby granted, free of charge, to any person obtaining a copy
9+
* of this software and associated documentation files (the "Software"), to deal
10+
* in the Software without restriction, including without limitation the rights
11+
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12+
* copies of the Software, and to permit persons to whom the Software is
13+
* furnished to do so, subject to the following conditions:
14+
*
15+
* The above copyright notice and this permission notice shall be included in
16+
* all copies or substantial portions of the Software.
17+
*
18+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20+
* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
21+
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22+
* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23+
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24+
* THE SOFTWARE.
25+
*/
26+
27+
#include "stm32f4xx_hal.h"
28+
#include "supervisor/shared/safe_mode.h"
29+
#include <stdbool.h>
30+
31+
// F4 Series
32+
#ifdef STM32F401xE
33+
#include "stm32f4/stm32f401xe/clocks.h"
34+
#endif
35+
#ifdef STM32F411xE
36+
#include "stm32f4/stm32f411xe/clocks.h"
37+
#endif
38+
#ifdef STM32F412Zx
39+
#include "stm32f4/stm32f412zx/clocks.h"
40+
#endif
41+
#ifdef STM32F405xx
42+
#include "stm32f4/stm32f405xx/clocks.h"
43+
#endif
44+
#ifdef STM32F407xx
45+
#include "stm32f4/stm32f407xx/clocks.h"
46+
#endif
47+
48+
void stm32_peripherals_clocks_init(void) {
49+
RCC_ClkInitTypeDef RCC_ClkInitStruct;
50+
RCC_OscInitTypeDef RCC_OscInitStruct;
51+
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct;
52+
bool lse_failure = false;
53+
54+
// Set voltage scaling in accordance with system clock speed
55+
__HAL_RCC_PWR_CLK_ENABLE();
56+
__HAL_PWR_VOLTAGESCALING_CONFIG(CPY_CLK_VSCALE);
57+
58+
// Set up primary PLL and HSE clocks
59+
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
60+
#if (BOARD_HAS_LOW_SPEED_CRYSTAL)
61+
RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_LSE;
62+
RCC_OscInitStruct.LSEState = RCC_LSE_ON;
63+
#else
64+
RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_LSI;
65+
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
66+
#endif
67+
RCC_OscInitStruct.HSEState = BOARD_HSE_SOURCE;
68+
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
69+
RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
70+
RCC_OscInitStruct.PLL.PLLM = HSE_VALUE/1000000;
71+
RCC_OscInitStruct.PLL.PLLN = CPY_CLK_PLLN;
72+
RCC_OscInitStruct.PLL.PLLP = CPY_CLK_PLLP;
73+
RCC_OscInitStruct.PLL.PLLQ = CPY_CLK_PLLQ;
74+
#if (CPY_CLK_USB_USES_AUDIOPLL)
75+
RCC_OscInitStruct.PLL.PLLR = 2; // Unused but required by HAL
76+
#endif
77+
78+
if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
79+
// Failure likely means a LSE issue - attempt to swap to LSI, and set to crash
80+
RCC_OscInitStruct.LSEState = RCC_LSE_OFF;
81+
RCC_OscInitStruct.OscillatorType |= RCC_OSCILLATORTYPE_LSI;
82+
RCC_OscInitStruct.LSIState = RCC_LSI_ON;
83+
if(HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
84+
// No HSE means no USB, so just fail forever
85+
while(1);
86+
}
87+
lse_failure = true;
88+
}
89+
90+
// Configure bus clock sources and divisors
91+
RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
92+
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
93+
RCC_ClkInitStruct.AHBCLKDivider = CPY_CLK_AHBDIV;
94+
RCC_ClkInitStruct.APB1CLKDivider = CPY_CLK_APB1DIV;
95+
RCC_ClkInitStruct.APB2CLKDivider = CPY_CLK_APB2DIV;
96+
HAL_RCC_ClockConfig(&RCC_ClkInitStruct, CPY_CLK_FLASH_LATENCY);
97+
98+
// Set up non-bus peripherals
99+
// TODO: I2S settings go here
100+
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_RTC;
101+
#if (BOARD_HAS_LOW_SPEED_CRYSTAL)
102+
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSE;
103+
#else
104+
PeriphClkInitStruct.RTCClockSelection = RCC_RTCCLKSOURCE_LSI;
105+
#endif
106+
#if (CPY_CLK_USB_USES_AUDIOPLL)
107+
// Not supported by all lines. Should always result in 48M.
108+
PeriphClkInitStruct.PLLI2S.PLLI2SM = HSE_VALUE/1000000;
109+
PeriphClkInitStruct.PLLI2S.PLLI2SQ = 4;
110+
PeriphClkInitStruct.PLLI2S.PLLI2SN = 192;
111+
PeriphClkInitStruct.PeriphClockSelection |= RCC_PERIPHCLK_CK48;
112+
PeriphClkInitStruct.Clk48ClockSelection = RCC_CK48CLKSOURCE_PLLI2SQ;
113+
#endif
114+
115+
HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct);
116+
117+
if (lse_failure) {
118+
reset_into_safe_mode(HARD_CRASH); //TODO: make safe mode category CLOCK_FAULT?
119+
}
120+
}

‎ports/stm/peripherals/stm32f4/stm32f401xe/clocks.c

Lines changed: 0 additions & 62 deletions
This file was deleted.

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