SystemVerilog code for arbitrary width random number utilities.
I needed an efficient, easy way to generate gray codes for dual clock FIFOs. It's a pain to manually write out a gray code. Why not let a module do the heavy lifting for you?
- Take files from
src/and add them to your own project. If you use hdlmake, you can add this repository itself as a remote module. - Other helpful modules are also available in this GitHub organization.
- Consult the testbench in
test/xorshift_tb.svfor example usage. - Read through the parameter descriptions in
xorshift.svand tailor any instantiations to your situation. - Please create an issue if you run into a problem or have any questions.