8000 sdmmc: implement partial DDR support · espressif/esp-idf@78fab8a · GitHub
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sdmmc: implement partial DDR support
Works for 3.3V eMMC in 4 line mode. Not implemented: - DDR mode for SD cards (UHS-I) also need voltage to be switched to 1.8V. - 8-line DDR mode for eMMC to be implemented later.
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12 files changed

+156
-33
lines changed

12 files changed

+156
-33
lines changed

‎components/driver/include/driver/sdmmc_defs.h

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -161,10 +161,10 @@
161161
/* EXT_CSD_CARD_TYPE */
162162
/* The only currently valid values for this field are 0x01, 0x03, 0x07,
163163
* 0x0B and 0x0F. */
164-
#define EXT_CSD_CARD_TYPE_F_26M (1 << 0)
165-
#define EXT_CSD_CARD_TYPE_F_52M (1 << 1)
166-
#define EXT_CSD_CARD_TYPE_F_52M_1_8V (1 << 2)
167-
#define EXT_CSD_CARD_TYPE_F_52M_1_2V (1 << 3)
164+
#define EXT_CSD_CARD_TYPE_F_26M (1 << 0) /* SDR at "rated voltages */
165+
#define EXT_CSD_CARD_TYPE_F_52M (1 << 1) /* SDR at "rated voltages */
166+
#define EXT_CSD_CARD_TYPE_F_52M_1_8V (1 << 2) /* DDR, 1.8V or 3.3V I/O */
167+
#define EXT_CSD_CARD_TYPE_F_52M_1_2V (1 << 3) /* DDR, 1.2V I/O */
168168
#define EXT_CSD_CARD_TYPE_26M 0x01
169169
#define EXT_CSD_CARD_TYPE_52M 0x03
170170
#define EXT_CSD_CARD_TYPE_52M_V18 0x07

‎components/driver/include/driver/sdmmc_host.h

Lines changed: 15 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -33,13 +33,17 @@ extern "C" {
3333
* Uses SDMMC peripheral, with 4-bit mode enabled, and max frequency set to 20MHz
3434
*/
3535
#define SDMMC_HOST_DEFAULT() {\
36-
.flags = SDMMC_HOST_FLAG_4BIT, \
36+
.flags = SDMMC_HOST_FLAG_8BIT | \
37+
SDMMC_HOST_FLAG_4BIT | \
38+
SDMMC_HOST_FLAG_1BIT | \
39+
SDMMC_HOST_FLAG_DDR, \
3740
.slot = SDMMC_HOST_SLOT_1, \
3841
.max_freq_khz = SDMMC_FREQ_DEFAULT, \
3942
.io_voltage = 3.3f, \
4043
.init = &sdmmc_host_init, \
4144
.set_bus_width = &sdmmc_host_set_bus_width, \
4245
.get_bus_width = &sdmmc_host_get_slot_width, \
46+
.set_bus_ddr_mode = &sdmmc_host_set_bus_ddr_mode, \
4347
.set_card_clk = &sdmmc_host_set_card_clk, \
4448
.do_transaction = &sdmmc_host_do_transaction, \
4549
.deinit = &sdmmc_host_deinit, \
@@ -150,6 +154,16 @@ size_t sdmmc_host_get_slot_width(int slot);
150154
*/
151155
esp_err_t sdmmc_host_set_card_clk(int slot, uint32_t freq_khz);
152156

157+
/**
158+
* @brief Enable or disable DDR mode of SD interface
159+
* @param slot slot number (SDMMC_HOST_SLOT_0 or SDMMC_HOST_SLOT_1)
160+
* @param ddr_enabled enable or disable DDR mode
161+
* @return
162+
* - ESP_OK on success
163+
* - ESP_ERR_NOT_SUPPORTED if DDR mode is not supported on this slot
164+
*/
165+
esp_err_t sdmmc_host_set_bus_ddr_mode(int slot, bool ddr_enabled);
166+
153167
/**
154168
* @brief Send command to the card and get response
155169
*

‎components/driver/include/driver/sdmmc_types.h

Lines changed: 6 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -110,6 +110,8 @@ typedef struct {
110110
#define SCF_RSP_R5B (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX|SCF_RSP_BSY)
111111
#define SCF_RSP_R6 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
112112
#define SCF_RSP_R7 (SCF_RSP_PRESENT|SCF_RSP_CRC|SCF_RSP_IDX)
113+
/* special flags */
114+
#define SCF_WAIT_BUSY 0x2000 /*!< Wait for completion of card busy signal before returning */
113115
/** @endcond */
114116
esp_err_t error; /*!< error returned from transfer */
115117
int timeout_ms; /*!< response timeout, in milliseconds */
@@ -127,6 +129,7 @@ typedef struct {
127129
#define SDMMC_HOST_FLAG_4BIT BIT(1) /*!< host supports 4-line SD and MMC protocol */
128130
#define SDMMC_HOST_FLAG_8BIT BIT(2) /*!< host supports 8-line MMC protocol */
129131
#define SDMMC_HOST_FLAG_SPI BIT(3) /*!< host supports SPI protocol */
132+
#define SDMMC_HOST_FLAG_DDR BIT(4) /*!< host supports DDR mode for SD/MMC */
130133
int slot; /*!< slot number, to be passed to host functions */
131134
int max_freq_khz; /*!< max frequency supported by the host */
132135
#define SDMMC_FREQ_DEFAULT 20000 /*!< SD/MMC Default speed (limited by clock divider) */
@@ -138,6 +141,7 @@ typedef struct {
138141
esp_err_t (*init)(void); /*!< Host function to initialize the driver */
139142
esp_err_t (*set_bus_width)(int slot, size_t width); /*!< host function to set bus width */
140143
size_t (*get_bus_width)(int slot); /*!< host function to get bus width */
144+
esp_err_t (*set_bus_ddr_mode)(int slot, bool ddr_enable); /*!< host function to set DDR mode */
141145
esp_err_t (*set_card_clk)(int slot, uint32_t freq_khz); /*!< host function to set card clock frequency */
142146
esp_err_t (*do_transaction)(int slot, sdmmc_command_t* cmdinfo); /*!< host function to do a transaction */
143147
esp_err_t (*deinit)(void); /*!< host function to deinitialize the driver */
@@ -163,7 +167,8 @@ typedef struct {
163167
uint32_t is_mmc : 1; /*!< Bit indicates if the card is MMC */
164168
uint32_t num_io_functions : 3; /*!< If is_sdio is 1, contains the number of IO functions on the card */
165169
uint32_t log_bus_width : 2; /*!< log2(bus width supported by card) */
166-
uint32_t reserved : 24; /*!< Reserved for future expansion */
170+
uint32_t is_ddr : 1; /*!< Card supports DDR mode */
171+
uint32_t reserved : 23; /*!< Reserved for future expansion */
167172
} sdmmc_card_t;
168173

169174

‎components/driver/include/driver/sdspi_host.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -41,6 +41,7 @@ extern "C" {
4141
.init = &sdspi_host_init, \
4242
.set_bus_width = NULL, \
4343
.get_bus_width = NULL, \
44+
.set_bus_ddr_mode = NULL, \
4445
.set_card_clk = &sdspi_host_set_card_clk, \
4546
.do_transaction = &sdspi_host_do_transaction, \
4647
.deinit = &sdspi_host_deinit, \

‎components/driver/sdmmc_host.c

Lines changed: 30 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -267,6 +267,9 @@ esp_err_t sdmmc_host_init()
267267
SDMMC_INTMASK_RESP_ERR | SDMMC_INTMASK_HLE; //sdio is enabled only when use.
268268
SDMMC.ctrl.int_enable = 1;
269269

270+
// Disable generation of Busy Clear Interrupt
271+
SDMMC.cardthrctl.busy_clr_int_en = 0;
272+
270273
// Enable DMA
271274
sdmmc_host_dma_init();
272275

@@ -465,6 +468,28 @@ size_t sdmmc_host_get_slot_width(int slot)
465468
return s_slot_width[slot];
466469
}
467470

471+
esp_err_t sdmmc_host_set_bus_ddr_mode(int slot, bool ddr_enabled)
472+
{
473+
if (!(slot == 0 || slot == 1)) {
474+
return ESP_ERR_INVALID_ARG;
475+
}
476+
if (s_slot_width[slot] == 8 && ddr_enabled) {
477+
ESP_LOGW(TAG, "DDR mode with 8-bit bus width is not supported yet");
478+
// requires reconfiguring controller clock for 2x card frequency
479+
return ESP_ERR_NOT_SUPPORTED;
480+
}
481+
uint32_t mask = BIT(slot);
482+
if (ddr_enabled) {
483+
SDMMC.uhs.ddr |= mask;
484+
SDMMC.emmc_ddr_reg |= mask;
485+
} else {
486+
SDMMC.uhs.ddr &= ~mask;
487+
SDMMC.emmc_ddr_reg &= ~mask;
488+
}
489+
ESP_LOGD(TAG, "slot=%d ddr=%d", slot, ddr_enabled ? 1 : 0);
490+
return ESP_OK;
491+
}
492+
468493
static void sdmmc_host_dma_init()
469494
{
470495
SDMMC.ctrl.dma_enable = 1;
@@ -504,6 +529,11 @@ void sdmmc_host_dma_resume()
504529
SDMMC.pldmnd = 1;
505530
}
506531

532+
bool sdmmc_host_card_busy()
533+
{
534+
return SDMMC.status.data_busy == 1;
535+
}
536+
507537
esp_err_t sdmmc_host_io_int_enable(int slot)
508538
{
509539
configure_pin(sdmmc_slot_info[slot].d1_gpio);

‎components/driver/sdmmc_private.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -38,6 +38,8 @@ void sdmmc_host_dma_stop();
3838

3939
void sdmmc_host_dma_resume();
4040

41+
bool sdmmc_host_card_busy();
42+
4143
esp_err_t sdmmc_host_transaction_handler_init();
4244

4345
void sdmmc_host_transaction_handler_deinit();

‎components/driver/sdmmc_transaction.c

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,7 @@
1919
#include "freertos/FreeRTOS.h"
2020
#include "freertos/queue.h"
2121
#include "freertos/semphr.h"
22+
#include "freertos/task.h"
2223
#include "soc/sdmmc_periph.h"
2324
#include "soc/soc_memory_layout.h"
2425
#include "driver/sdmmc_types.h"
@@ -80,6 +81,7 @@ static esp_err_t process_events(sdmmc_event_t evt, sdmmc_command_t* cmd,
8081
static void process_command_response(uint32_t status, sdmmc_command_t* cmd);
8182
static void fill_dma_descriptors(size_t num_desc);
8283
static size_t get_free_descriptors_count();
84+
static bool wait_for_busy_cleared(int timeout_ms);
8385

8486
esp_err_t sdmmc_host_transaction_handler_init()
8587
{
@@ -165,6 +167,11 @@ esp_err_t sdmmc_host_do_transaction(int slot, sdmmc_command_t* cmdinfo)
165167
break;
166168
}
167169
}
170+
if (ret == ESP_OK && (cmdinfo->flags & SCF_WAIT_BUSY)) {
171+
if (!wait_for_busy_cleared(cmdinfo->timeout_ms)) {
172+
ret = ESP_ERR_TIMEOUT;
173+
}
174+
}
168175
s_is_app_cmd = (ret == ESP_OK && cmdinfo->opcode == MMC_APP_CMD);
169176

170177
out:
@@ -461,5 +468,23 @@ static esp_err_t process_events(sdmmc_event_t evt, sdmmc_command_t* cmd,
461468
return ESP_OK;
462469
}
463470

471+
static bool wait_for_busy_cleared(int timeout_ms)
472+
{
473+
if (timeout_ms == 0) {
474+
return !sdmmc_host_card_busy();
475+
}
464476

477+
/* It would have been nice to do this without polling, however the peripheral
478+
* can only generate Busy Clear Interrupt for data write commands, and waiting
479+
* for busy clear is mostly needed for other commands such as MMC_SWITCH.
480+
*/
481+
int timeout_ticks = (timeout_ms + portTICK_PERIOD_MS - 1) / portTICK_PERIOD_MS;
482+
while (timeout_ticks-- > 0) {
483+
if (!sdmmc_host_card_busy()) {
484+
return true;
485+
}
486+
vTaskDelay(1);
487+
}
488+
return false;
489+
}
465490

‎components/sdmmc/sdmmc_common.c

Lines changed: 29 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
11
/*
22
* Copyright (c) 2006 Uwe Stuehler <uwe@openbsd.org>
3-
* Adaptations to ESP-IDF Copyright (c) 2016 Espressif Systems (Shanghai) PTE LTD
3+
* Adaptations to ESP-IDF Copyright (c) 2016-2018 Espressif Systems (Shanghai) PTE LTD
44
*
55
* Permission to use, copy, modify, and distribute this software for any
66
* purpose with or without fee is hereby granted, provided that the above
@@ -214,6 +214,18 @@ esp_err_t sdmmc_init_host_frequency(sdmmc_card_t* card)
214214
return err;
215215
}
216216
}
217+
218+
if (card->is_ddr) {
219+
if (card->host.set_bus_ddr_mode == NULL) {
220+
ESP_LOGE(TAG, "host doesn't support DDR mode or voltage switching");
221+
return ESP_ERR_NOT_SUPPORTED;
222+
}
223+
esp_err_t err = (*card->host.set_bus_ddr_mode)(card->host.slot, true);
224+
if (err != ESP_OK) {
225+
ESP_LOGE(TAG, "failed to switch bus to DDR mode (0x%x)", err);
226+
return err;
227+
}
228+
}
217229
return ESP_OK;
218230
}
219231

@@ -246,7 +258,12 @@ void sdmmc_card_print_info(FILE* stream, const sdmmc_card_t* card)
246258
type = (card->ocr & SD_OCR_SDHC_CAP) ? "SDHC/SDXC" : "SDSC";
247259
}
248260
fprintf(stream, "Type: %s\n", type);
249-
fprintf(stream, "Speed: %s\n", (card->max_freq_khz > SDMMC_FREQ_26M) ? "high speed" : "default speed");
261+
if (card->max_freq_khz < 1000) {
262+
fprintf(stream, "Speed: %d kHz\n", card->max_freq_khz);
263+
} else {
264+
fprintf(stream, "Speed: %d MHz%s\n", card->max_freq_khz / 1000,
265+
card->is_ddr ? ", DDR" : "");
266+
}
250267
fprintf(stream, "Size: %lluMB\n", ((uint64_t) card->csd.capacity) * card->csd.sector_size / (1024 * 1024));
251268

252269
if (print_csd) {
@@ -269,13 +286,17 @@ esp_err_t sdmmc_fix_host_flags(sdmmc_card_t* card)
269286
int slot_bit_width = card->host.get_bus_width(card->host.slot);
270287
if (slot_bit_width == 1 &&
271288
(card->host.flags & (width_4bit | width_8bit))) {
272-
ESP_LOGW(TAG, "host slot is configured in 1-bit mode");
273-
card->host.flags &= ~width_mask;
274-
card->host.flags |= ~(width_1bit);
275-
} else if (slot_bit_width == 4 && (card->host.flags & width_8bit)){
276-
ESP_LOGW(TAG, "host slot is configured in 4-bit mode");
277289
card->host.flags &= ~width_mask;
278-
card->host.flags |= width_4bit;
290+
card->host.flags |= width_1bit;
291+
} else if (slot_bit_width == 4 && (card->host.flags & width_8bit)) {
292+
if ((card->host.flags & width_4bit) == 0) {
293+
ESP_LOGW(TAG, "slot width set to 4, but host flags don't have 4 line mode enabled; using 1 line mode");
294+
card->host.flags &= ~width_mask;
295+
card->host.flags |= width_1bit;
296+
} else {
297+
card->host.flags &= ~width_mask;
298+
card->host.flags |= width_4bit;
299+
}
279300
}
280301
return ESP_OK;
281302
}

‎components/sdmmc/sdmmc_init.c

Lines changed: 7 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -93,6 +93,11 @@ esp_err_t sdmmc_card_init(const sdmmc_host_t* config, sdmmc_card_t* card)
9393
/* MMC cards: read CXD */
9494
SDMMC_INIT_STEP(is_mmc, sdmmc_init_mmc_read_ext_csd);
9595

96+
/* Try to switch card to HS mode if the card supports it.
97+
* Set card->max_freq_khz value accordingly.
98+
*/
99+
SDMMC_INIT_STEP(always, sdmmc_init_card_hs_mode);
100+
96101
/* Set bus width. One call for every kind of card, then one for the host */
97102
if (!is_spi) {
98103
SDMMC_INIT_STEP(is_sdmem, sdmmc_init_sd_bus_width);
@@ -101,19 +106,10 @@ esp_err_t sdmmc_card_init(const sdmmc_host_t* config, sdmmc_card_t* card)
101106
SDMMC_INIT_STEP(always, sdmmc_init_host_bus_width);
102107
}
103108

104-
SDMMC_INIT_STEP(is_sdmem, sdmmc_check_scr);
105-
106-
/* Try to switch card to HS mode if the card supports it.
107-
* Set card->max_freq_khz value accordingly.
108-
*/
109-
SDMMC_INIT_STEP(always, sdmmc_init_card_hs_mode);
110-
111-
/* So far initialization has been done at probing frequency.
112-
* Switch to the host to use card->max_freq_khz frequency.
113-
*/
109+
/* Switch to the host to use card->max_freq_khz frequency. */
114110
SDMMC_INIT_STEP(always, sdmmc_init_host_frequency);
115111

116-
/* Sanity check after switching the frequency */
112+
/* Sanity check after switching the bus mode and frequency */
117113
SDMMC_INIT_STEP(is_sdmem, sdmmc_check_scr);
118114
/* TODO: add similar checks for eMMC and SDIO */
119115

‎components/sdmmc/sdmmc_mmc.c

Lines changed: 20 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -48,9 +48,15 @@ esp_err_t sdmmc_init_mmc_read_ext_csd(sdmmc_card_t* card)
4848
}
4949
card_type = ext_csd[EXT_CSD_CARD_TYPE];
5050

51-
/* TODO: add DDR support */
51+
card->is_ddr = 0;
5252
if (card_type & EXT_CSD_CARD_TYPE_F_52M_1_8V) {
5353
card->max_freq_khz = SDMMC_FREQ_52M;
54+
if ((card->host.flags & SDMMC_HOST_FLAG_DDR) &&
55+
card->host.max_freq_khz >= SDMMC_FREQ_26M &&
56+
card->host.get_bus_width(card->host.slot) == 4) {
57+
ESP_LOGD(TAG, "card and host support DDR mode");
58+
card->is_ddr = 1;
59+
}
5460
} else if (card_type & EXT_CSD_CARD_TYPE_F_52M) {
5561
card->max_freq_khz = SDMMC_FREQ_52M;
5662
} else if (card_type & EXT_CSD_CARD_TYPE_F_26M) {
@@ -60,7 +66,7 @@ esp_err_t sdmmc_init_mmc_read_ext_csd(sdmmc_card_t* card)
6066
}
6167
/* For MMC cards, use speed value from EXT_CSD */
6268
card->csd.tr_speed = card->max_freq_khz * 1000;
63-
ESP_LOGD(TAG, "MMC card supports %d khz bus frequency", card->max_freq_khz);
69+
ESP_LOGD(TAG, "MMC card type %d, max_freq_khz=%d, is_ddr=%d", card_type, card->max_freq_khz, card->is_ddr);
6470
card->max_freq_khz = MIN(card->max_freq_khz, card->host.max_freq_khz);
6571

6672
if (card->host.flags & SDMMC_HOST_FLAG_8BIT) {
@@ -104,13 +110,21 @@ esp_err_t sdmmc_init_mmc_bus_width(sdmmc_card_t* card)
104110
}
105111

106112
if (card->log_bus_width > 0) {
107-
int csd_bus_width_value = 0;
113+
int csd_bus_width_value = EXT_CSD_BUS_WIDTH_1;
108114
int bus_width = 1;
109115
if (card->log_bus_width == 2) {
110-
csd_bus_width_value = EXT_CSD_BUS_WIDTH_4;
116+
if (card->is_ddr) {
117+
csd_bus_width_value = EXT_CSD_BUS_WIDTH_4_DDR;
118+
} else {
119+
csd_bus_width_value = EXT_CSD_BUS_WIDTH_4;
120+
}
111121
bus_width = 4;
112122
} else if (card->log_bus_width == 3) {
113-
csd_bus_width_value = EXT_CSD_BUS_WIDTH_8;
123+
if (card->is_ddr) {
124+
csd_bus_width_value = EXT_CSD_BUS_WIDTH_8_DDR;
125+
} else {
126+
csd_bus_width_value = EXT_CSD_BUS_WIDTH_8;
127+
}
114128
bus_width = 8;
115129
}
116130
err = sdmmc_mmc_switch(card, EXT_CSD_CMD_SET_NORMAL,
@@ -205,7 +219,7 @@ esp_err_t sdmmc_mmc_switch(sdmmc_card_t* card, uint8_t set, uint8_t index, uint8
205219
sdmmc_command_t cmd = {
206220
.opcode = MMC_SWITCH,
207221
.arg = (MMC_SWITCH_MODE_WRITE_BYTE << 24) | (index << 16) | (value << 8) | set,
208-
.flags = SCF_RSP_R1B | SCF_CMD_AC,
222+
.flags = SCF_RSP_R1B | SCF_CMD_AC | SCF_WAIT_BUSY,
209223
};
210224
esp_err_t err = sdmmc_send_cmd(card, &cmd);
211225
if (err == ESP_OK) {

‎components/soc/esp32/include/soc/sdmmc_reg.h

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -71,6 +71,7 @@
7171
#define SDMMC_INTMASK_EBE BIT(15)
7272
#define SDMMC_INTMASK_ACD BIT(14)
7373
#define SDMMC_INTMASK_SBE BIT(13)
74+
#define SDMMC_INTMASK_BCI BIT(13)
7475
#define SDMMC_INTMASK_HLE BIT(12)
7576
#define SDMMC_INTMASK_FRUN BIT(11)
7677
#define SDMMC_INTMASK_HTO BIT(10)

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