From b110d4f2b6bb0cd4428438d5df6467f9505f19ed Mon Sep 17 00:00:00 2001 From: Josh Currier Date: Mon, 19 Jun 2023 18:47:41 -0400 Subject: [PATCH 1/4] Add support for Whirlpool Rigel board --- boards.txt | 159 +++++++++++++++++++++++- variants/whirlpool_rigel/pins_arduino.h | 50 ++++++++ 2 files changed, 208 insertions(+), 1 deletion(-) create mode 100644 variants/whirlpool_rigel/pins_arduino.h diff --git a/boards.txt b/boards.txt index e52e6dc2e93..9f75bf61b11 100644 --- a/boards.txt +++ b/boards.txt @@ -23834,4 +23834,161 @@ nebulas3.menu.EraseFlash.none.upload.erase_cmd= nebulas3.menu.EraseFlash.all=Enabled nebulas3.menu.EraseFlash.all.upload.erase_cmd=-e -############################################################## \ No newline at end of file +############################################################## + +rigel.name=Whirlpool Rigel Module + +rigel.bootloader.tool=esptool_py +rigel.bootloader.tool.default=esptool_py + +rigel.upload.tool=esptool_py +rigel.upload.tool.default=esptool_py +rigel.upload.tool.network=esp_ota + +rigel.upload.maximum_size=1310720 +rigel.upload.maximum_data_size=327680 +rigel.upload.flags= +rigel.upload.extra_flags= + +rigel.serial.disableDTR=false +rigel.serial.disableRTS=false + +rigel.build.tarch=xtensa +rigel.build.bootloader_addr=0x1000 +rigel.build.target=esp32 +rigel.build.mcu=esp32 +rigel.build.core=esp32 +rigel.build.variant=whirlpool_rigel +rigel.build.board=WHIRLPOOL_RIGEL + +rigel.build.f_cpu=240000000L +rigel.build.flash_size=16MB +rigel.build.flash_freq=40m +rigel.build.flash_mode=dio +rigel.build.boot=dio +rigel.build.partitions=default +rigel.build.defines= +rigel.build.loop_core= +rigel.build.event_core= + +rigel.menu.PartitionScheme.default=Default 4MB with spiffs (1.2MB APP/1.5MB SPIFFS) +rigel.menu.PartitionScheme.default.build.partitions=default +rigel.menu.PartitionScheme.defaultffat=Default 4MB with ffat (1.2MB APP/1.5MB FATFS) +rigel.menu.PartitionScheme.defaultffat.build.partitions=default_ffat +rigel.menu.PartitionScheme.default_8MB=8M with spiffs (3MB APP/1.5MB SPIFFS) +rigel.menu.PartitionScheme.default_8MB.build.partitions=default_8MB +rigel.menu.PartitionScheme.default_8MB.upload.maximum_size=3342336 +rigel.menu.PartitionScheme.minimal=Minimal (1.3MB APP/700KB SPIFFS) +rigel.menu.PartitionScheme.minimal.build.partitions=minimal +rigel.menu.PartitionScheme.no_ota=No OTA (2MB APP/2MB SPIFFS) +rigel.menu.PartitionScheme.no_ota.build.partitions=no_ota +rigel.menu.PartitionScheme.no_ota.upload.maximum_size=2097152 +rigel.menu.PartitionScheme.noota_3g=No OTA (1MB APP/3MB SPIFFS) +rigel.menu.PartitionScheme.noota_3g.build.partitions=noota_3g +rigel.menu.PartitionScheme.noota_3g.upload.maximum_size=1048576 +rigel.menu.PartitionScheme.noota_ffat=No OTA (2MB APP/2MB FATFS) +rigel.menu.PartitionScheme.noota_ffat.build.partitions=noota_ffat +rigel.menu.PartitionScheme.noota_ffat.upload.maximum_size=2097152 +rigel.menu.PartitionScheme.noota_3gffat=No OTA (1MB APP/3MB FATFS) +rigel.menu.PartitionScheme.noota_3gffat.build.partitions=noota_3gffat +rigel.menu.PartitionScheme.noota_3gffat.upload.maximum_size=1048576 +rigel.menu.PartitionScheme.huge_app=Huge APP (3MB No OTA/1MB SPIFFS) +rigel.menu.PartitionScheme.huge_app.build.partitions=huge_app +rigel.menu.PartitionScheme.huge_app.upload.maximum_size=3145728 +rigel.menu.PartitionScheme.min_spiffs=Minimal SPIFFS (1.9MB APP with OTA/190KB SPIFFS) +rigel.menu.PartitionScheme.min_spiffs.build.partitions=min_spiffs +rigel.menu.PartitionScheme.min_spiffs.upload.maximum_size=1966080 +rigel.menu.PartitionScheme.fatflash=16M Flash (2MB APP/12.5MB FATFS) +rigel.menu.PartitionScheme.fatflash.build.partitions=ffat +rigel.menu.PartitionScheme.fatflash.upload.maximum_size=2097152 +rigel.menu.PartitionScheme.app3M_fat9M_16MB=16M Flash (3MB APP/9.9MB FATFS) +rigel.menu.PartitionScheme.app3M_fat9M_16MB.build.partitions=app3M_fat9M_16MB +rigel.menu.PartitionScheme.app3M_fat9M_16MB.upload.maximum_size=3145728 +rigel.menu.PartitionScheme.rainmaker=RainMaker +rigel.menu.PartitionScheme.rainmaker.build.partitions=rainmaker +rigel.menu.PartitionScheme.rainmaker.upload.maximum_size=3145728 + +rigel.menu.CPUFreq.240=240MHz (WiFi/BT) +rigel.menu.CPUFreq.240.build.f_cpu=240000000L +rigel.menu.CPUFreq.160=160MHz (WiFi/BT) +rigel.menu.CPUFreq.160.build.f_cpu=160000000L +rigel.menu.CPUFreq.80=80MHz (WiFi/BT) +rigel.menu.CPUFreq.80.build.f_cpu=80000000L +rigel.menu.CPUFreq.40=40MHz (40MHz XTAL) +rigel.menu.CPUFreq.40.build.f_cpu=40000000L +rigel.menu.CPUFreq.20=20MHz (40MHz XTAL) +rigel.menu.CPUFreq.20.build.f_cpu=20000000L +rigel.menu.CPUFreq.10=10MHz (40MHz XTAL) +rigel.menu.CPUFreq.10.build.f_cpu=10000000L + +rigel.menu.FlashMode.qio=QIO +rigel.menu.FlashMode.qio.build.flash_mode=dio +rigel.menu.FlashMode.qio.build.boot=qio +rigel.menu.FlashMode.dio=DIO +rigel.menu.FlashMode.dio.build.flash_mode=dio +rigel.menu.FlashMode.dio.build.boot=dio +rigel.menu.FlashMode.qout=QOUT +rigel.menu.FlashMode.qout.build.flash_mode=dout +rigel.menu.FlashMode.qout.build.boot=qout +rigel.menu.FlashMode.dout=DOUT +rigel.menu.FlashMode.dout.build.flash_mode=dout +rigel.menu.FlashMode.dout.build.boot=dout + +rigel.menu.FlashFreq.80=80MHz +rigel.menu.FlashFreq.80.build.flash_freq=80m +rigel.menu.FlashFreq.40=40MHz +rigel.menu.FlashFreq.40.build.flash_freq=40m + +rigel.menu.FlashSize.4M=4MB (32Mb) +rigel.menu.FlashSize.4M.build.flash_size=4MB +rigel.menu.FlashSize.8M=8MB (64Mb) +rigel.menu.FlashSize.8M.build.flash_size=8MB +rigel.menu.FlashSize.8M.build.partitions=default_8MB +rigel.menu.FlashSize.2M=2MB (16Mb) +rigel.menu.FlashSize.2M.build.flash_size=2MB +rigel.menu.FlashSize.2M.build.partitions=minimal +rigel.menu.FlashSize.16M=16MB (128Mb) +rigel.menu.FlashSize.16M.build.flash_size=16MB + +rigel.menu.UploadSpeed.921600=921600 +rigel.menu.UploadSpeed.921600.upload.speed=921600 +rigel.menu.UploadSpeed.115200=115200 +rigel.menu.UploadSpeed.115200.upload.speed=115200 +rigel.menu.UploadSpeed.256000.windows=256000 +rigel.menu.UploadSpeed.256000.upload.speed=256000 +rigel.menu.UploadSpeed.230400.windows.upload.speed=256000 +rigel.menu.UploadSpeed.230400=230400 +rigel.menu.UploadSpeed.230400.upload.speed=230400 +rigel.menu.UploadSpeed.460800.linux=460800 +rigel.menu.UploadSpeed.460800.macosx=460800 +rigel.menu.UploadSpeed.460800.upload.speed=460800 +rigel.menu.UploadSpeed.512000.windows=512000 +rigel.menu.UploadSpeed.512000.upload.speed=512000 + +rigel.menu.LoopCore.1=Core 1 +rigel.menu.LoopCore.1.build.loop_core=-DARDUINO_RUNNING_CORE=1 +rigel.menu.LoopCore.0=Core 0 +rigel.menu.LoopCore.0.build.loop_core=-DARDUINO_RUNNING_CORE=0 + +rigel.menu.EventsCore.1=Core 1 +rigel.menu.EventsCore.1.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=1 +rigel.menu.EventsCore.0=Core 0 +rigel.menu.EventsCore.0.build.event_core=-DARDUINO_EVENT_RUNNING_CORE=0 + +rigel.menu.DebugLevel.none=None +rigel.menu.DebugLevel.none.build.code_debug=0 +rigel.menu.DebugLevel.error=Error +rigel.menu.DebugLevel.error.build.code_debug=1 +rigel.menu.DebugLevel.warn=Warn +rigel.menu.DebugLevel.warn.build.code_debug=2 +rigel.menu.DebugLevel.info=Info +rigel.menu.DebugLevel.info.build.code_debug=3 +rigel.menu.DebugLevel.debug=Debug +rigel.menu.DebugLevel.debug.build.code_debug=4 +rigel.menu.DebugLevel.verbose=Verbose +rigel.menu.DebugLevel.verbose.build.code_debug=5 + +rigel.menu.EraseFlash.none=Disabled +rigel.menu.EraseFlash.none.upload.erase_cmd= +rigel.menu.EraseFlash.all=Enabled +rigel.menu.EraseFlash.all.upload.erase_cmd=-e diff --git a/variants/whirlpool_rigel/pins_arduino.h b/variants/whirlpool_rigel/pins_arduino.h new file mode 100644 index 00000000000..3ff1ac13494 --- /dev/null +++ b/variants/whirlpool_rigel/pins_arduino.h @@ -0,0 +1,50 @@ +#ifndef Pins_Arduino_h +#define Pins_Arduino_h + +#include + +#define EXTERNAL_NUM_INTERRUPTS 16 +#define NUM_DIGITAL_PINS 40 +#define NUM_ANALOG_INPUTS 16 + +#define analogInputToDigitalPin(p) (((p)<20)?(analogChannelToDigitalPin(p)):-1) +#define digitalPinToInterrupt(p) (((p)<40)?(p):-1) +#define digitalPinHasPWM(p) (p < 34) + +static const uint8_t TX = 1; +static const uint8_t RX = 3; + +// WIN serial + +#define WIN_TX 27 +#define WIN_RX 37 + +// MCU serial + +#define MCU_TX 26 +#define MCU_RX 38 + +// Wakeup pins + +static const uint8_t WKUP_WIN = 36; // WIN message interrupt input +static const uint8_t WKUP_IN = 39; // Interrupt from MCU +static const uint8_t WKUP_OUT = 15; // Interrupt to MCU + +// Audio + +static const uint8_t I2S_DAT = 2; // Audio amp data +static const uint8_t I2S_BCLK = 0; // Audio amp clock +static const uint8_t I2S_LRCK = 4; // Audio amp frame select + +// ILI9341 display panel (VSPI) + +static const uint8_t DISP_SS = 5; // SPI slave select +static const uint8_t DISP_MOSI = 23; // SPI data to LCD +static const uint8_t DISP_MISO = 19; // SPI data from LCD +static const uint8_t DISP_SCK = 18; // SPI clock +static const uint8_t DISP_DC = 33; // Data/Command +static const uint8_t DISP_RST = 25; // Reset +static const uint8_t DISP_TE = 34; // Tearing effect +static const uint8_t DISP_BL_EN = 32; // Backlight enable + +#endif /* Pins_Arduino_h */ From e0742c08d199d608fa13639143dc8a27ae58c736 Mon Sep 17 00:00:00 2001 From: Josh Currier Date: Mon, 19 Jun 2023 18:49:50 -0400 Subject: [PATCH 2/4] Include conventional SPI constants --- variants/whirlpool_rigel/pins_arduino.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/variants/whirlpool_rigel/pins_arduino.h b/variants/whirlpool_rigel/pins_arduino.h index 3ff1ac13494..9524f5db7fd 100644 --- a/variants/whirlpool_rigel/pins_arduino.h +++ b/variants/whirlpool_rigel/pins_arduino.h @@ -36,6 +36,13 @@ static const uint8_t I2S_DAT = 2; // Audio amp data static const uint8_t I2S_BCLK = 0; // Audio amp clock static const uint8_t I2S_LRCK = 4; // Audio amp frame select +// SPI + +static const uint8_t SS = 5; +static const uint8_t MOSI = 23; +static const uint8_t MISO = 19; +static const uint8_t SCK = 18; + // ILI9341 display panel (VSPI) static const uint8_t DISP_SS = 5; // SPI slave select From fde18639728883d7de7fb16cbb7812c199059ae4 Mon Sep 17 00:00:00 2001 From: Josh Currier Date: Mon, 19 Jun 2023 18:55:44 -0400 Subject: [PATCH 3/4] Change author and repo to match this fork --- package.json | 5 +++-- package/package_esp32_index.template.json | 6 +++--- 2 files changed, 6 insertions(+), 5 deletions(-) diff --git a/package.json b/package.json index 1b79acb417a..5d727334f8b 100644 --- a/package.json +++ b/package.json @@ -6,11 +6,12 @@ "framework", "arduino", "espressif", - "esp32" + "esp32", + "rigel" ], "license": "LGPL-2.1-or-later", "repository": { "type": "git", - "url": "https://github.com/espressif/arduino-esp32" + "url": "https://github.com/doitaljosh/arduino-esp32" } } diff --git a/package/package_esp32_index.template.json b/package/package_esp32_index.template.json index 09dddcd3316..0bb9a709fcf 100644 --- a/package/package_esp32_index.template.json +++ b/package/package_esp32_index.template.json @@ -2,9 +2,9 @@ "packages": [ { "name": "esp32", - "maintainer": "Espressif Systems", - "websiteURL": "https://github.com/espressif/arduino-esp32", - "email": "hristo@espressif.com", + "maintainer": "Josh Currier", + "websiteURL": "https://github.com/doitaljosh/arduino-esp32", + "email": "doitaljosh@gmail.com", "help": { "online": "http://esp32.com" }, From f9b74abc77f8c09132b5a1a21ca29c53155888c3 Mon Sep 17 00:00:00 2001 From: Josh Currier Date: Mon, 19 Jun 2023 18:58:13 -0400 Subject: [PATCH 4/4] Change author and repo to match this fork --- package/package_esp32_index.template.json | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/package/package_esp32_index.template.json b/package/package_esp32_index.template.json index 0bb9a709fcf..f598180d1ef 100644 --- a/package/package_esp32_index.template.json +++ b/package/package_esp32_index.template.json @@ -1,7 +1,7 @@ { "packages": [ { - "name": "esp32", + "name": "esp32-rigel", "maintainer": "Josh Currier", "websiteURL": "https://github.com/doitaljosh/arduino-esp32", "email": "doitaljosh@gmail.com",