8000 change bus clock (busywait) to be programmable [issue 2524], convert … · esp8266/Arduino@b22de4d · GitHub
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change bus clock (busywait) to be programmable [issue 2524], convert tabs to spaces
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‎cores/esp8266/core_esp8266_si2c.cpp

Lines changed: 27 additions & 27 deletions
Original file line numberDiff line numberDiff line change
@@ -40,8 +40,8 @@ extern "C" {
4040
{
4141
GPEC = (1 << twi_sda);
4242
}
43-
static inline __attribute__((always_inline)) bool SDA_READ(const int twi_sda)
44-
{
43+
static inline __attribute__((always_inline)) bool SDA_READ(const int twi_sda)
44+
{
4545
return (GPI & (1 << twi_sda)) != 0;
4646
}
4747
static inline __attribute__((always_inline)) void SCL_LOW(const int twi_scl)
@@ -52,8 +52,8 @@ extern "C" {
5252
{
5353
GPEC = (1 << twi_scl);
5454
}
55-
static inline __attribute__((always_inline)) bool SCL_READ(const int twi_scl)
56-
{
55+
static inline __attribute__((always_inline)) bool SCL_READ(const int twi_scl)
56+
{
5757
return (GPI & (1 << twi_scl)) != 0;
5858
}
5959

@@ -160,22 +160,22 @@ static Twi twi;
160160

161161
void Twi::setClock(unsigned int freq)
162162
{
163-
if (freq < 250) // minimum freq 250Hz to prevent overflow @ 232Hz
164-
freq = 250;
165-
166-
preferred_si2c_clock = freq;
163+
if (freq < 250) // minimum freq 250Hz to prevent overflow @ 232Hz
164+
freq = 250;
165+
166+
preferred_si2c_clock = freq;
167167

168168
#if F_CPU == FCPU80
169169

170170
if (freq > 400000)
171-
freq = 400000;
171+
freq = 400000;
172172
twi_dcount = (500000000 / freq); // half-cycle period in ns
173173
twi_dcount = (1000*(twi_dcount - 1120)) / 62500; // (half cycle - overhead) / busywait loop time
174-
174+
175175
#else
176176

177-
if (freq > 800000)
178-
freq = 800000;
177+
if (freq > 800000)
178+
freq = 800000;
179179
twi_dcount = (500000000 / freq); // half-cycle period in ns
180180
twi_dcount = (1000*(twi_dcount - 560)) / 31250; // (half cycle - overhead) / busywait loop time
181181

@@ -226,7 +226,7 @@ void Twi::enableSlave()
226226
unsigned int i;
227227
for (i = 0; i < v; i++) // loop time is 5 machine cycles: 31.25ns @ 160MHz, 62.5ns @ 80MHz
228228
{
229-
asm("nop"); // minimum element to keep GCC from optimizing this function out.
229+
asm("nop"); // minimum element to keep GCC from optimizing this function out.
230230
}
231231
}
232232

@@ -472,14 +472,14 @@ void ICACHE_RAM_ATTR Twi::reply(uint8_t ack)
472472
if (ack)
473473
{
474474
//TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWINT) | _BV(TWEA);
475-
SCL_HIGH(twi.twi_scl); // _BV(TWINT)
476-
twi_ack = 1; // _BV(TWEA)
475+
SCL_HIGH(twi.twi_scl); // _BV(TWINT)
476+
twi_ack = 1; // _BV(TWEA)
477477
}
478478
else
479479
{
480480
//TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWINT);
481-
SCL_HIGH(twi.twi_scl); // _BV(TWINT)
482-
twi_ack = 0; // ~_BV(TWEA)
481+
SCL_HIGH(twi.twi_scl); // _BV(TWINT)
482+
twi_ack = 0; // ~_BV(TWEA)
483483
}
484484
}
485485

@@ -488,8 +488,8 @@ void ICACHE_RAM_ATTR Twi::releaseBus(void)
488488
{
489489
// release bus
490490
//TWCR = _BV(TWEN) | _BV(TWIE) | _BV(TWEA) | _BV(TWINT);
491-
SCL_HIGH(twi.twi_scl); // _BV(TWINT)
492-
twi_ack = 1; // _BV(TWEA)
491+
SCL_HIGH(twi.twi_scl); // _BV(TWINT)
492+
twi_ack = 1; // _BV(TWEA)
493493
SDA_HIGH(twi.twi_sda);
494494

495495
// update twi state
@@ -660,11 +660,11 @@ void ICACHE_RAM_ATTR Twi::onSclChange(void)
660660
unsigned int scl;
661661

662662
// Store bool return in int to reduce final code size.
663-
663+
664664
sda = SDA_READ(twi.twi_sda);
665665
scl = SCL_READ(twi.twi_scl);
666666

667-
twi.twip_status = 0xF8; // reset TWI status
667+
twi.twip_status = 0xF8; // reset TWI status
668668

669669
int twip_state_mask = S2M(twi.twip_state);
670670
IFSTATE(S2M(TWIP_START) | S2M(TWIP_REP_START) | S2M(TWIP_SLA_W) | S2M(TWIP_READ))
@@ -739,7 +739,7 @@ void ICACHE_RAM_ATTR Twi::onSclChange(void)
739739
}
740740
else
741741
{
742-
SCL_LOW(twi.twi_scl); // clock stretching
742+
SCL_LOW(twi.twi_scl); // clock stretching
743743
SDA_HIGH(twi.twi_sda);
744744
twi.twip_mode = TWIPM_ADDRESSED;
745745
if (!(twi.twi_data & 0x01))
@@ -757,7 +757,7 @@ void ICACHE_RAM_ATTR Twi::onSclChange(void)
757757
}
758758
else
759759
{
760-
SCL_LOW(twi.twi_scl); // clock stretching
760+
SCL_LOW(twi.twi_scl); // clock stretching
761761
SDA_HIGH(twi.twi_sda);
762762
if (!twi.twi_ack)
763763
{
@@ -835,7 +835,7 @@ void ICACHE_RAM_ATTR Twi::onSclChange(void)
835835
}
836836
else
837837
{
838-
SCL_LOW(twi.twi_scl); // clock stretching
838+
SCL_LOW(twi.twi_scl); // clock stretching
839839
if (twi.twi_ack && twi.twi_ack_rec)
840840
{
841841
twi.onTwipEvent(TW_ST_DATA_ACK);
@@ -881,7 +881,7 @@ void ICACHE_RAM_ATTR Twi::onSdaChange(void)
881881
else IFSTATE(S2M(TWIP_START) | S2M(TWIP_REP_START) | S2M(TWIP_SEND_ACK) | S2M(TWIP_WAIT_ACK) | S2M(TWIP_SLA_R) | S2M(TWIP_REC_ACK) | S2M(TWIP_READ_ACK) | S2M(TWIP_RWAIT_ACK) | S2M(TWIP_WRITE))
882882
{
883883
// START or STOP
884-
SDA_HIGH(twi.twi_sda); // Should not be necessary
884+
SDA_HIGH(twi.twi_sda); // Should not be necessary
885885
twi.onTwipEvent(TW_BUS_ERROR);
886886
twi.twip_mode = TWIPM_WAIT;
887887
twi.twip_state = TWIP_BUS_ERR;
@@ -891,7 +891,7 @@ void ICACHE_RAM_ATTR Twi::onSdaChange(void)
891891
if (sda)
892892
{
893893
// STOP
894-
SCL_LOW(twi.twi_scl); // clock stretching
894+
SCL_LOW(twi.twi_scl); // generates a low SCL pulse after STOP
895895
ets_timer_disarm(&twi.timer);
896896
twi.twip_state = TWIP_IDLE;
897897
twi.twip_mode = TWIPM_IDLE;
@@ -925,7 +925,7 @@ void ICAC 623B HE_RAM_ATTR Twi::onSdaChange(void)
925925
else
926926
{
927927
// during first bit in byte transfer - ok
928-
SCL_LOW(twi.twi_scl); // clock stretching
928+
SCL_LOW(twi.twi_scl); // clock stretching
929929
twi.onTwipEvent(TW_SR_STOP);
930930
if (sda)
931931
{

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