8000 stm32: Rework ROM partition support. · dpgeorge/micropython@82ed2fc · GitHub
[go: up one dir, main page]
Skip to content

Commit 82ed2fc

Browse files
dpgeorgedpgeorge
committed
stm32: Rework ROM partition support.
Now supports both internal flash and external QSPI-mapped flash. Signed-off-by: Damien George <damien@micropython.org>
1 parent bde499b commit 82ed2fc

File tree

21 files changed

+250
-171
lines changed

21 files changed

+250
-171
lines changed

‎ports/stm32/Makefile

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -287,6 +287,7 @@ SRC_C += \
287287
rtc.c \
288288
flash.c \
289289
flashbdev.c \
290+
romfs.c \
290291
spibdev.c \
291292
storage.c \
292293
sdcard.c \

‎ports/stm32/boards/ADAFRUIT_F405_EXPRESS/mpconfigboard.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -25,6 +25,10 @@
2525
#define MICROPY_HW_RTC_USE_US (0)
2626
#define MICROPY_HW_RTC_USE_CALOUT (1)
2727

28+
// ROMFS config
29+
#define MICROPY_HW_ROMFS_ENABLE_INTERNAL_FLASH (1)
30+
#define MICROPY_HW_ROMFS_ENABLE_PART1 (1)
31+
2832
// External SPI Flash config
2933
#if !MICROPY_HW_ENABLE_INTERNAL_FLASH_STORAGE
3034

‎ports/stm32/boards/LEGO_HUB_NO6/mpconfigboard.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,10 @@
3232
// For 2.7 to 3.6 V, 75 to 100 MHz: 3 wait states.
3333
#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_3
3434

35+
// ROMFS config
36+
#define MICROPY_HW_ROMFS_ENABLE_INTERNAL_FLASH (1)
37+
#define MICROPY_HW_ROMFS_ENABLE_PART1 (1)
38+
3539
// UART buses
3640
// Bluetooth HCI
3741
#define MICROPY_HW_UART2_CTS (pyb_pin_BT_CTS)

‎ports/stm32/boards/LEGO_HUB_NO6/stm32f413xg.ld

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -3,11 +3,11 @@
33
*/
44

55
/* Specify the memory areas */
6-
/* FLASH_FS2 is placed before FLASH_TEXT to support 1MB and 1.5MB FLASH with common code in flashbdev.c */
76
MEMORY
87
{
98
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 1024K /* entire flash */
10-
FLASH_APP (rx) : ORIGIN = 0x08010000, LENGTH = 976K
9+
FLASH_APP (rx) : ORIGIN = 0x08010000, LENGTH = 448K
10+
FLASH_ROMFS (rx): ORIGIN = 0x08080000, LENGTH = 256K
1111
RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 320K /* SRAM1 + SRAM2 */
1212
}
1313

@@ -25,3 +25,7 @@ _ram_start = ORIGIN(RAM);
2525
_ram_end = ORIGIN(RAM) + LENGTH(RAM);
2626
_heap_start = _ebss; /* heap starts just after statically allocated memory */
2727
_heap_end = _sstack;
28+
29+
/* ROMFS location */
30+
_micropy_hw_romfs_part1_start = ORIGIN(FLASH_ROMFS);
31+
_micropy_hw_romfs_part1_size = LENGTH(FLASH_ROMFS);

‎ports/stm32/boards/LEGO_HUB_NO7/mpconfigboard.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -32,6 +32,10 @@
3232
// For 2.7 to 3.6 V, 75 to 100 MHz: 3 wait states.
3333
#define MICROPY_HW_FLASH_LATENCY FLASH_LATENCY_3
3434

35+
// ROMFS config
36+
#define MICROPY_HW_ROMFS_ENABLE_INTERNAL_FLASH (1)
37+
#define MICROPY_HW_ROMFS_ENABLE_PART1 (1)
38+
3539
// UART buses
3640
// Bluetooth HCI
3741
#define MICROPY_HW_UART2_CTS (pyb_pin_BT_CTS)

‎ports/stm32/boards/NUCLEO_F091RC/mpconfigboard.h

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -34,6 +34,10 @@
3434
// The board has an external 32kHz crystal
3535
#define MICROPY_HW_RTC_USE_LSE (1)
3636

37+
// ROMFS config
38+
#define MICROPY_HW_ROMFS_ENABLE_INTERNAL_FLASH (1)
39+
#define MICROPY_HW_ROMFS_ENABLE_PART1 (1)
40+
3741
// UART config
3842
#define MICROPY_HW_UART1_TX (pin_B6)
3943
#define MICROPY_HW_UART1_RX (pin_B7)

‎ports/stm32/boards/PYBD_SF2/f722_qspi.ld

Lines changed: 6 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -19,9 +19,9 @@
1919
MEMORY
2020
{
2121
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 512K
22-
FLASH_APP (rx) : ORIGIN = 0x08008000, LENGTH = 352K /* sectors 2-6 */
23-
FLASH_ROMFS (rx): ORIGIN = 0x08060000, LENGTH = 128K /* sector 7 */
24-
FLASH_EXT (rx) : ORIGIN = 0x90000000, LENGTH = 2048K /* external QSPI */
22+
FLASH_APP (rx) : ORIGIN = 0x08008000, LENGTH = 480K /* sectors 2-7 */
23+
FLASH_EXT (rx) : ORIGIN = 0x90000000, LENGTH = 1024K /* external QSPI */
24+
FLASH_ROMFS (rx): ORIGIN = 0x90100000, LENGTH = 512K /* external QSPI */
2525
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 256K /* DTCM+SRAM1+SRAM2 */
2626
}
2727

@@ -40,8 +40,9 @@ _ram_end = ORIGIN(RAM) + LENGTH(RAM);
4040
_heap_start = _ebss; /* heap starts just after statically allocated memory */
4141
_heap_end = _sstack;
4242

43-
_micropy_hw_romfs_start = ORIGIN(FLASH_ROMFS);
44-
_micropy_hw_romfs_size = LENGTH(FLASH_ROMFS);
43+
/* ROMFS location */
44+
_micropy_hw_romfs_part1_start = ORIGIN(FLASH_ROMFS);
45+
_micropy_hw_romfs_part1_size = LENGTH(FLASH_ROMFS);
4546

4647
/* Define output sections */
4748
SECTIONS
@@ -54,10 +55,6 @@ SECTIONS
5455
*lib/mynewt-nimble/*(.text* .rodata*)
5556
*lib/cyw43-driver/*(.rodata.w4343*_combined)
5657
*drivers/cyw43/*(.rodata.cyw43_btfw_*)
57-
*lib/oofatfs/*(.text* .rodata*)
58-
*lib/littlefs/*(.text* .rodata*)
59-
*lib/lwip/*(.text* .rodata*)
60-
*extmod/*(.text* .rodata*)
6158
. = ALIGN(4);
6259
} >FLASH_EXT
6360
}

‎ports/stm32/boards/PYBD_SF2/mpconfigboard.h

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,6 @@
2727
#define MICROPY_HW_BOARD_NAME "PYBD-SF2W"
2828
#define MICROPY_HW_MCU_NAME "STM32F722IEK"
2929

30-
#define MICROPY_VFS_ROM (1)
3130
#define MICROPY_PY_NETWORK_HOST 8000 NAME_DEFAULT "PYBD"
3231

3332
#define MICROPY_PY_PYB_LEGACY (1)
@@ -65,6 +64,11 @@ void board_sleep(int value);
6564
#define MICROPY_HW_RTC_USE_US (1)
6665
#define MICROPY_HW_RTC_USE_CALOUT (1)
6766

67+
// ROMFS config
68+
#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI (1)
69+
#define MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ (&spi_bdev2.spiflash)
70+
#define MICROPY_HW_ROMFS_ENABLE_PART1 (1)
71+
6872
// SPI flash #1, for R/W storage
6973
#define MICROPY_HW_SOFTQSPI_SCK_LOW(self) (GPIOE->BSRR = (0x10000 << 11))
7074
#define MICROPY_HW_SOFTQSPI_SCK_HIGH(self) (GPIOE->BSRR = (1 << 11))

‎ports/stm32/boards/PYBD_SF6/f767.ld

Lines changed: 4 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -18,8 +18,8 @@ MEMORY
1818
{
1919
FLASH (rx) : ORIGIN = 0x08000000, LENGTH = 2048K
2020
FLASH_APP (rx) : ORIGIN = 0x08008000, LENGTH = 1504K /* sectors 1-9 3x32K 1*128K 5*256K */
21-
FLASH_ROMFS (rx): ORIGIN = 0x08180000, LENGTH = 512K /* sectors 10-11 2*256k */
2221
FLASH_EXT (rx) : ORIGIN = 0x90000000, LENGTH = 2048K /* external QSPI */
22+
FLASH_ROMFS (rx): ORIGIN = 0x90000000, LENGTH = 1024K /* external QSPI */
2323
RAM (rwx) : ORIGIN = 0x20000000, LENGTH = 512K /* DTCM=128k, SRAM1=368K, SRAM2=16K */
2424
}
2525

@@ -38,7 +38,8 @@ _ram_end = ORIGIN(RAM) + LENGTH(RAM);
3838
_heap_start = _ebss; /* heap starts just after statically allocated memory */
3939
_heap_end = _sstack;
4040

41-
_micropy_hw_romfs_start = ORIGIN(FLASH_ROMFS);
42-
_micropy_hw_romfs_size = LENGTH(FLASH_ROMFS);
41+
/* ROMFS location */
42+
_micropy_hw_romfs_part1_start = ORIGIN(FLASH_ROMFS);
43+
_micropy_hw_romfs_part1_size = LENGTH(FLASH_ROMFS);
4344

4445
INCLUDE common_bl.ld

‎ports/stm32/boards/PYBD_SF6/mpconfigboard.h

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -45,6 +45,11 @@
4545
#define MICROPY_HW_CLK_PLLQ (6)
4646
#define MICROPY_HW_FLASH_LATENCY (FLASH_LATENCY_4)
4747

48+
// ROMFS config
49+
#define MICROPY_HW_ROMFS_ENABLE_EXTERNAL_QSPI (1)
50+
#define MICROPY_HW_ROMFS_QSPI_SPIFLASH_OBJ (&spi_bdev2.spiflash)
51+
#define MICROPY_HW_ROMFS_ENABLE_PART1 (1)
52+
4853
// Extra UART config
4954
#define MICROPY_HW_UART7_TX (pyb_pin_W16)
5055
#define MICROPY_HW_UART7_RX (pyb_pin_W22B)

0 commit comments

Comments
 (0)
0