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5 files changed

+78
-116
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5 files changed

+78
-116
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src/V3AstNodes.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -41,7 +41,7 @@ const char* AstIfaceRefDType::broken() const {
4141
}
4242

4343
AstIface* AstIfaceRefDType::ifaceViaCellp() const {
44-
return ((m_cellp && m_cellp->modp()) ? VN_AS(m_cellp->modp(), Iface) : m_ifacep);
44+
return m_cellp ? VN_AS(m_cellp->modp(), Iface) : m_ifacep;
4545
}
4646

4747
const char* AstNodeFTaskRef::broken() const {

src/V3Param.cpp

Lines changed: 69 additions & 100 deletions
Original file line numberDiff line numberDiff line change
@@ -984,90 +984,42 @@ class ParamVisitor final : public VNVisitor {
984984
ParamProcessor m_processor; // De-parameterize a cell, build modules
985985
UnrollStateful m_unroller; // Loop unroller
986986

987-
bool m_iterateModule = false; // Iterating module body
987+
// bool m_iterateModule = false; // Iterating module body
988988
string m_generateHierName; // Generate portion of hierarchy name
989989
string m_unlinkedTxt; // Text for AstUnlinkedRef
990990
AstNodeModule* m_modp; // Module iterating
991991
std::vector<AstDot*> m_dots; // Dot references to process
992-
std::multimap<bool, AstNode*> m_cellps; // Cells left to process (in current module)
993-
std::multimap<int, AstNodeModule*> m_workQueue; // Modules left to process
992+
// std::multimap<bool, AstNode*> m_cellps; // Cells left to process (in current module)
993+
// std::multimap<int, AstNodeModule*> m_workQueue; // Modules left to process
994994
std::vector<AstClass*> m_paramClasses; // Parameterized classes
995995

996996
// Map from AstNodeModule to set of all AstNodeModules that instantiates it.
997997
std::unordered_map<AstNodeModule*, std::unordered_set<AstNodeModule*>> m_parentps;
998998

999999
// METHODS
10001000

1001-
void visitCells(AstNodeModule* nodep) {
1002-
UASSERT_OBJ(!m_iterateModule, nodep, "Should not nest");
1003-
std::multimap<int, AstNodeModule*> workQueue;
1004-
workQueue.emplace(nodep->level(), nodep);
1005-
m_generateHierName = "";
1006-
m_iterateModule = true;
1007-
1008-
// Visit all cells under module, recursively
1009-
do {
1010-
const auto itm = workQueue.cbegin();
1011-
AstNodeModule* const modp = itm->second;
1012-
workQueue.erase(itm);
1013-
1014-
// Process once; note user2 will be cleared on specialization, so we will do the
1015-
// specialized module if needed
1016-
if (!modp->user2SetOnce()) {
1017-
1018-
// TODO: this really should be an assert, but classes and hier_blocks are
1019-
// special...
1020-
if (modp->someInstanceName().empty()) modp->someInstanceName(modp->origName());
1021-
1022-
// Iterate the body
1023-
{
1024-
VL_RESTORER(m_modp);
1025-
m_modp = modp;
1026-
iterateChildren(modp);
1027-
}
1028-
}
1029-
1030-
// Process interface cells, then non-interface cells, which may reference an interface
1031-
// cell.
1032-
while (!m_cellps.empty()) {
1033-
const auto itim = m_cellps.cbegin();
1034-
AstNode* const cellp = itim->second;
1035-
m_cellps.erase(itim);
1036-
1037-
AstNodeModule* srcModp = nullptr;
1038-
if (const auto* modCellp = VN_CAST(cellp, Cell)) {
1039-
srcModp = modCellp->modp();
1040-
} else if (const auto* classRefp = VN_CAST(cellp, ClassOrPackageRef)) {
1041-
srcModp = classRefp->classOrPackagep();
1042-
if (VN_IS(classRefp->classOrPackageNodep(), ParamTypeDType)) continue;
1043-
} else if (const auto* classRefp = VN_CAST(cellp, ClassRefDType)) {
1044-
srcModp = classRefp->classp();
1045-
} else {
1046-
cellp->v3fatalSrc("Expected module parameterization");
1047-
}
1048-
UASSERT_OBJ(srcModp, cellp, "Unlinked class ref");
1049-
1050-
// Update path
1051-
string someInstanceName(modp->someInstanceName());
1052-
if (const string* const genHierNamep = cellp->user2u().to<string*>()) {
1053-
someInstanceName += *genHierNamep;
1054-
cellp->user2p(nullptr);
1055-
VL_DO_DANGLING(delete genHierNamep, genHierNamep);
1056-
}
1001+
void visitModule(AstNodeModule* modp) {
1002+
// m_generateHierName = "";
1003+
UINFO(9, "Visit module " << modp << endl);
10571004

1058-
// Apply parameter specialization
1059-
m_processor.nodeDeparam(cellp, srcModp /* ref */, modp, someInstanceName);
1005+
// Process once; note user2 will be cleared on specialization, so we will do the
1006+
// specialized module if needed
1007+
if (!modp->user2SetOnce()) {
1008+
// FIXME: move to visit(AstNodeModule*)
10601009

1061-
// Add the (now potentially specialized) child module to the work queue
1062-
workQueue.emplace(srcModp->level(), srcModp);
1010+
// TODO: this really should be an assert, but classes and hier_blocks are
1011+
// special...
1012+
if (modp->someInstanceName().empty()) modp->someInstanceName(modp->origName());
10631013

1064-
// Add to the hierarchy registry
1065-
m_parentps[srcModp].insert(modp);
1014+
// Iterate the body
1015+
{
1016+
VL_RESTORER(m_modp);
1017+
m_modp = modp;
1018+
iterateChildren(modp);
10661019
}
1067-
if (workQueue.empty()) std::swap(workQueue, m_workQueue);
1068-
} while (!workQueue.empty());
1069-
1070-
m_iterateModule = false;
1020+
}
1021+
//
1022+
// m_iterateModule = false;
10711023
}
10721024

10731025
// Fix up level of module, based on who instantiates it
@@ -1089,7 +1041,39 @@ class ParamVisitor final : public VNVisitor {
10891041
nodep->user2p(genHierNamep);
10901042
// Visit parameters in the instantiation.
10911043
iterateChildren(nodep);
1092-
m_cellps.emplace(!isIface, nodep);
1044+
// m_cellps.emplace(!isIface, nodep);
1045+
// const auto itim = m_cellps.cbegin();
1046+
// AstNode* const cellp = itim->second;
1047+
// m_cellps.erase(itim);
1048+
AstNode* const cellp = nodep;
1049+
AstNodeModule* srcModp = nullptr;
1050+
if (const auto* modCellp = VN_CAST(cellp, Cell)) {
1051+
srcModp = modCellp->modp();
1052+
} else if (const auto* classRefp = VN_CAST(cellp, ClassOrPackageRef)) {
1053+
srcModp = classRefp->classOrPackagep();
1054+
if (VN_IS(classRefp->classOrPackageNodep(), ParamTypeDType)) return;
1055+
} else if (const auto* classRefp = VN_CAST(cellp, ClassRefDType)) {
1056+
srcModp = classRefp->classp();
1057+
} else {
1058+
cellp->v3fatalSrc("Expected module parameterization");
1059+
}
1060+
UASSERT_OBJ(srcModp, cellp, "Unlinked class ref");
1061+
1062+
// Update path
1063+
string someInstanceName(m_modp->someInstanceName());
1064+
if (const string* const genHierNamep = cellp->user2u().to<string*>()) {
1065+
someInstanceName += *genHierNamep;
1066+
cellp->user2p(nullptr);
1067+
VL_DO_DANGLING(delete genHierNamep, genHierNamep);
1068+
}
1069+
1070+
// Apply parameter specialization
1071+
m_processor.nodeDeparam(cellp, srcModp /* ref */, m_modp, someInstanceName);
1072+
1073+
visitModule(srcModp);
1074+
1075+
// // Add to the hierarchy registry
1076+
// m_parentps[srcModp].insert(m_modp);
10931077
}
10941078

10951079
// RHSs of AstDots need a relink when LHS is a parameterized class reference
@@ -1113,25 +1097,14 @@ class ParamVisitor final : public VNVisitor {
11131097
if (nodep->dead()) return; // Marked by LinkDot (and above)
11141098
if (AstClass* const classp = VN_CAST(nodep, Class)) {
11151099
if (classp->isParameterized()) {
1116-
// Don't enter into a definition.
1117-
// If a class is used, it will be visited through a reference
1100+
// Collect param classes
11181101
m_paramClasses.push_back(classp);
1119-
return;
11201102
}
11211103
}
11221104

1123-
if (m_iterateModule) { // Iterating body
1124-
UINFO(4, " MOD-under-MOD. " << nodep << endl);
1125-
m_workQueue.emplace(nodep->level(), nodep); // Delay until current module is done
1126-
return;
1127-
}
1128-
1129-
// Start traversal at root-like things
1130-
if (nodep->level() <= 2 // Haven't added top yet, so level 2 is the top
1131-
|| VN_IS(nodep, Class) // Nor moved classes
1132-
|| VN_IS(nodep, Package)) { // Likewise haven't done wrapTopPackages yet
1133-
visitCells(nodep);
1134-
}
1105+
// Only do root module & package here. Modules & classes used in parent module will be
1106+
// visited from visitCellOrClassRef()
1107+
if (nodep->level() <= 2 || VN_IS(nodep, Package)) visitModule(nodep);
11351108
}
11361109

11371110
void visit(AstCell* nodep) override {
@@ -1177,11 +1150,13 @@ class ParamVisitor final : public VNVisitor {
11771150
}
11781151
void visit(AstVarXRef* nodep) override {
11791152
// Check to see if the scope is just an interface because interfaces are special
1153+
UINFO(9, "Relink " << nodep << endl);
11801154
const string dotted = nodep->dotted();
11811155
if (!dotted.empty() && nodep->varp() && nodep->varp()->isParam()) {
11821156
const AstNode* backp = nodep;
11831157
while ((backp = backp->backp())) {
11841158
if (VN_IS(backp, NodeModule)) {
1159+
nodep->v3error("Failed to find referenced target");
11851160
UINFO(9, "Hit module boundary, done looking for interface" << endl);
11861161
break;
11871162
}
@@ -1197,22 +1172,16 @@ class ParamVisitor final : public VNVisitor {
11971172
ifacerefp = VN_CAST(VN_CAST(backp, Var)->childDTypep()->getChildDTypep(),
11981173
IfaceRefDType);
11991174
}
1175+
12001176
// Interfaces passed in on the port map have ifaces
1201-
if (const AstIface* const ifacep = ifacerefp->ifacep()) {
1202-
if (dotted == backp->name()) {
1203-
UINFO(9, "Iface matching scope: " << ifacep << endl);
1204-
if (ifaceParamReplace(nodep, ifacep->stmtsp())) { //
1205-
return;
1206-
}
1207-
}
1208-
}
1209-
// Interfaces declared in this module have cells
1210-
else if (const AstCell* const cellp = ifacerefp->cellp()) {
1211-
if (dotted == cellp->name()) {
1212-
UINFO(9, "Iface matching scope: " << cellp << endl);
1213-
if (ifaceParamReplace(nodep, cellp->paramsp())) { //
1214-
return;
1215-
}
1177+
const AstIface* ifacep = ifacerefp->ifaceViaCellp();
1178+
const string name
1179+
= ifacerefp->cellp() ? ifacerefp->cellp()->name() : backp->name();
1180+
if (dotted == name) {
1181+
UINFO(9, "Iface matching scope: " << ifacep << endl);
1182+
if (ifaceParamReplace(nodep, ifacep->stmtsp())) { //
1183+
UINFO(9, "Relpaced " << nodep << " -> iface " << ifacep << endl);
1184+
return;
12161185
}
12171186
}
12181187
}

test_regress/t/t_interface_param_acc_bits.out

Lines changed: 0 additions & 5 deletions
This file was deleted.

test_regress/t/t_interface_param_acc_bits.pl

Lines changed: 2 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -8,11 +8,9 @@
88
# Version 2.0.
99
# SPDX-License-Identifier: LGPL-3.0-only OR Artistic-2.0
1010

11-
scenarios(simulator => 1);
11+
scenarios(linter => 1);
1212

13-
compile(
14-
fails => $Self->{vlt_all}, # Unsupported bug1523
15-
expect_filename => $Self->{golden_filename},
13+
lint(
1614
);
1715

1816
ok(1);

test_regress/t/t_interface_param_acc_bits.v

Lines changed: 6 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -10,12 +10,12 @@ interface simple_bus #(PARAMETER = 0);
1010
parameter [6:0] dummy = 22;
1111
endinterface
1212

13+
interface simple_bus2 #(PARAMETER = 0);
14+
parameter [6:0] dummy = 22;
15+
if (PARAMETER != 7) $error("Wrong parameter");
16+
endinterface
17+
1318
module t ();
1419
simple_bus sb_intf();
15-
simple_bus #(.PARAMETER($bits(sb_intf.dummy))) simple();
16-
initial begin
17-
if (simple.PARAMETER != 7) $stop;
18-
$write("*-* All Finished *-*\n");
19-
$finish;
20-
end
20+
simple_bus2 #(.PARAMETER($bits(sb_intf.dummy))) simple();
2121
endmodule

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