Bug fix: at 160MHz compiled, don't force minimum Timer1 latency to 2µs.

dok-net · dok-net · commit 69e201683d00 · 2020-06-08T07:39:18.000+02:00
diff --git a/cores/esp8266/core_esp8266_waveform.cpp b/cores/esp8266/core_esp8266_waveform.cpp
@@ -407,16 +407,16 @@ static ICACHE_RAM_ATTR void timer1Interrupt() {
     nextTimerCcys = callbackCcys;
   }
 
+  // Firing timer too soon, the NMI occurs before ISR has returned.
+  if (nextTimerCcys < IRQLATENCYCCYS) {
+      nextTimerCcys = IRQLATENCYCCYS;
+  }
+
   // Timer is 80MHz fixed. 160MHz CPU frequency need scaling.
   if (ISCPUFREQ160MHZ || isCPU2X) {
     nextTimerCcys >>= 1;
   }
 
-  // Firing timer too soon, the NMI occurs before ISR has returned.
-  if (nextTimerCcys <= IRQLATENCYCCYS) {
-    nextTimerCcys = IRQLATENCYCCYS;
-  }
-
   // Register access is fast and edge IRQ was configured before.
   T1L = nextTimerCcys;
 }
