8000 Merge git://git.infradead.org/intel-iommu · bsd-unix/linux@9f86262 · GitHub
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torvaldstorvalds
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Merge git://git.infradead.org/intel-iommu
Pull intel iommu updates from David Woodhouse: "This lays a little of the groundwork for upcoming Shared Virtual Memory support — fixing some bogus #defines for capability bits and adding the new ones, and starting to use the new wider page tables where we can, in anticipation of actually filling in the new fields therein. It also allows graphics devices to be assigned to VM guests again. This got broken in 3.17 by disallowing assignment of RMRR-afflicted devices. Like USB, we do understand why there's an RMRR for graphics devices — and unlike USB, it's actually sane. So we can make an exception for graphics devices, just as we do USB controllers. Finally, tone down the warning about the X2APIC_OPT_OUT bit, due to persistent requests. X2APIC_OPT_OUT was added to the spec as a nasty hack to allow broken BIOSes to forbid us from using X2APIC when they do stupid and invasive things and would break if we did. Someone noticed that since Windows doesn't have full IOMMU support for DMA protection, setting the X2APIC_OPT_OUT bit made Windows avoid initialising the IOMMU on the graphics unit altogether. This means that it would be available for use in "driver mode", where the IOMMU registers are made available through a BAR of the graphics device and the graphics driver can do SVM all for itself. So they started setting the X2APIC_OPT_OUT bit on *all* platforms with SVM capabilities. And even the platforms which *might*, if the planets had been aligned correctly, possibly have had SVM capability but which in practice actually don't" * git://git.infradead.org/intel-iommu: iommu/vt-d: support extended root and context entries iommu/vt-d: Add new extended capabilities from v2.3 VT-d specification iommu/vt-d: Allow RMRR on graphics devices too iommu/vt-d: Print x2apic opt out info instead of printing a warning iommu/vt-d: kill bogus ecap_niotlb_iunits()
2 parents 85f2901 + 03ecc32 commit 9f86262

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3 files changed

+82
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lines changed

‎drivers/iommu/intel-iommu.c

Lines changed: 66 additions & 76 deletions
-
root->val |= 1;
Original file line numberDiff line numberDiff line change
@@ -50,6 +50,7 @@
5050
#define CONTEXT_SIZE VTD_PAGE_SIZE
5151

5252
#define IS_GFX_DEVICE(pdev) ((pdev->class >> 16) == PCI_BASE_CLASS_DISPLAY)
53+
#define IS_USB_DEVICE(pdev) ((pdev->class >> 8) == PCI_CLASS_SERIAL_USB)
5354
#define IS_ISA_DEVICE(pdev) ((pdev->class >> 8) == PCI_CLASS_BRIDGE_ISA)
5455
#define IS_AZALIA(pdev) ((pdev)->vendor == 0x8086 && (pdev)->device == 0x3a3e)
5556

@@ -184,32 +185,11 @@ static int force_on = 0;
184185
* 64-127: Reserved
185186
*/
186187
struct root_entry {
187-
u64 val;
188-
u64 rsvd1;
188+
u64 lo;
189+
u64 hi;
189190
};
190191
#define ROOT_ENTRY_NR (VTD_PAGE_SIZE/sizeof(struct root_entry))
191-
static inline bool root_present(struct root_entry *root)
192-
{
193-
return (root->val & 1);
194-
}
195-
static inline void set_root_present(struct root_entry *root)
196-
{
197
198-
}
199-
static inline void set_root_value(struct root_entry *root, unsigned long value)
200-
{
201-
root->val &= ~VTD_PAGE_MASK;
202-
root->val |= value & VTD_PAGE_MASK;
203-
}
204192

205-
static inline struct context_entry *
206-
get_context_addr_from_root(struct root_entry *root)
207-
{
208-
return (struct context_entry *)
209-
(root_present(root)?phys_to_virt(
210-
root->val & VTD_PAGE_MASK) :
211-
NULL);
212-
}
213193

214194
/*
215195
* low 64 bits:
@@ -682,6 +662,40 @@ static void domain_update_iommu_cap(struct dmar_domain *domain)
682662
domain->iommu_superpage = domain_update_iommu_superpage(NULL);
683663
}
684664

665+
static inline struct context_entry *iommu_context_addr(struct intel_iommu *iommu,
666+
u8 bus, u8 devfn, int alloc)
667+
{
668+
struct root_entry *root = &iommu->root_entry[bus];
669+
struct context_entry *context;
670+
u64 *entry;
671+
672+
if (ecap_ecs(iommu->ecap)) {
673+
if (devfn >= 0x80) {
674+
devfn -= 0x80;
675+
entry = &root->hi;
676+
}
677+
devfn *= 2;
678+
}
679+
entry = &root->lo;
680+
if (*entry & 1)
681+
context = phys_to_virt(*entry & VTD_PAGE_MASK);
682+
else {
683+
unsigned long phy_addr;
684+
if (!alloc)
685+
return NULL;
686+
687+
context = alloc_pgtable_page(iommu->node);
688+
if (!context)
689+
return NULL;
690+
691+
__iommu_flush_cache(iommu, (void *)context, CONTEXT_SIZE);
692+
phy_addr = virt_to_phys((void *)context);
693+
*entry = phy_addr | 1;
694+
__iommu_flush_cache(iommu, entry, sizeof(*entry));
695+
}
696+
return &context[devfn];
697+
}
698+
685699
static struct intel_iommu *device_to_iommu(struct device *dev, u8 *bus, u8 *devfn)
686700
{
687701
struct dmar_drhd_unit *drhd = NULL;
@@ -741,75 +755,36 @@ static void domain_flush_cache(struct dmar_domain *domain,
741755
clflush_cache_range(addr, size);
742756
}
743757

744-
/* Gets context entry for a given bus and devfn */
745-
static struct context_entry * device_to_context_entry(struct intel_iommu *iommu,
746-
u8 bus, u8 devfn)
747-
{
748-
struct root_entry *root;
749-
struct context_entry *context;
750-
unsigned long phy_addr;
751-
unsigned long flags;
752-
753-
spin_lock_irqsave(&iommu->lock, flags);
754-
root = &iommu->root_entry[bus];
755-
context = get_context_addr_from_root(root);
756-
if (!context) {
757-
context = (struct context_entry *)
758-
alloc_pgtable_page(iommu->node);
759-
if (!context) {
760-
spin_unlock_irqrestore(&iommu->lock, flags);
761-
return NULL;
762-
}
763-
__iommu_flush_cache(iommu, (void *)context, CONTEXT_SIZE);
764-
phy_addr = virt_to_phys((void *)context);
765-
set_root_value(root, phy_addr);
766-
set_root_present(root);
767-
__iommu_flush_cache(iommu, root, sizeof(*root));
768-
}
769-
spin_unlock_irqrestore(&iommu->lock, flags);
770-
return &context[devfn];
771-
}
772-
773758
static int device_context_mapped(struct intel_iommu *iommu, u8 bus, u8 devfn)
774759
{
775-
struct root_entry *root;
776760
struct context_entry *context;
777-
int ret;
761+
int ret = 0;
778762
unsigned long flags;
779763

780764
spin_lock_irqsave(&iommu->lock, flags);
781-
root = &iommu->root_entry[bus];
782-
context = get_context_addr_from_root(root);
783-
if (!context) {
784-
ret = 0;
785-
goto out;
786-
}
787-
ret = context_present(&context[devfn]);
788-
out:
765+
context = iommu_context_addr(iommu, bus, devfn, 0);
766+
if (context)
767+
ret = context_present(context);
789768
spin_unlock_irqrestore(&iommu->lock, flags);
790769
return ret;
791770
}
792771

793772
static void clear_context_table(struct intel_iommu *iommu, u8 bus, u8 devfn)
794773
{
795-
struct root_entry *root;
796774
struct context_entry *context;
797775
unsigned long flags;
798776

799777
spin_lock_irqsave(&iommu->lock, flags);
800-
root = &iommu->root_entry[bus];
801-
context = get_context_addr_from_root(root);
778+
context = iommu_context_addr(iommu, bus, devfn, 0);
802779
if (context) {
803-
context_clear_entry(&context[devfn]);
804-
__iommu_flush_cache(iommu, &context[devfn], \
805-
sizeof(*context));
780+
context_clear_entry(context);
781+
__iommu_flush_cache(iommu, context, sizeof(*context));
806782
}
807783
spin_unlock_irqrestore(&iommu->lock, flags);
808784
}
809785

810786
static void free_context_table(struct intel_iommu *iommu)
811787
{
812-
struct root_entry *root;
813788
int i;
814789
unsigned long flags;
815790
struct context_entry *context;
@@ -819,10 +794,17 @@ static void free_context_table(struct intel_iommu *iommu)
819794
goto out;
820795
}
821796
for (i = 0; i < ROOT_ENTRY_NR; i++) {
822-
root = &iommu->root_entry[i];
823-
context = get_context_addr_from_root(root);
797+
context = iommu_context_addr(iommu, i, 0, 0);
798+
if (context)
799+
free_pgtable_page(context);
800+
801+
if (!ecap_ecs(iommu->ecap))
802+
continue;
803+
804+
context = iommu_context_addr(iommu, i, 0x80, 0);
824805
if (context)
825806
free_pgtable_page(context);
807+
826808
}
827809
free_pgtable_page(iommu->root_entry);
828810
iommu->root_entry = NULL;
@@ -1146,14 +1128,16 @@ static int iommu_alloc_root_entry(struct intel_iommu *iommu)
11461128

11471129
static void iommu_set_root_entry(struct intel_iommu *iommu)
11481130
{
1149-
void *addr;
1131+
u64 addr;
11501132
u32 sts;
11511133
unsigned long flag;
11521134

1153-
addr = iommu->root_entry;
1135+
addr = virt_to_phys(iommu->root_entry);
1136+
if (ecap_ecs(iommu->ecap))
1137+
addr |= DMA_RTADDR_RTT;
11541138

11551139
raw_spin_lock_irqsave(&iommu->register_lock, flag);
1156-
dmar_writeq(iommu->reg + DMAR_RTADDR_REG, virt_to_phys(addr));
1140+
dmar_writeq(iommu->reg + DMAR_RTADDR_REG, addr);
11571141

11581142
writel(iommu->gcmd | DMA_GCMD_SRTP, iommu->reg + DMAR_GCMD_REG);
11591143

@@ -1800,7 +1784,9 @@ static int domain_context_mapping_one(struct dmar_domain *domain,
18001784
BUG_ON(translation != CONTEXT_TT_PASS_THROUGH &&
18011785
translation != CONTEXT_TT_MULTI_LEVEL);
18021786

1803-
context = device_to_context_entry(iommu, bus, devfn);
1787+
spin_lock_irqsave(&iommu->lock, flags);
1788+
context = iommu_context_addr(iommu, bus, devfn, 1);
1789+
spin_unlock_irqrestore(&iommu->lock, flags);
18041790
if (!context)
18051791
return -ENOMEM;
18061792
spin_lock_irqsave(&iommu->lock, flags);
@@ -2564,6 +2550,10 @@ static bool device_has_rmrr(struct device *dev)
25642550
* In both cases we assume that PCI USB devices with RMRRs have them largely
25652551
* for historical reasons and that the RMRR space is not actively used post
25662552
* boot. This exclusion may change if vendors begin to abuse it.
2553+
*
2554+
* The same exception is made for graphics devices, with the requirement that
2555+
* any use of the RMRR regions will be torn down before assigning the device
2556+
* to a guest.
25672557
*/
25682558
static bool device_is_rmrr_locked(struct device *dev)
25692559
{
@@ -2573,7 +2563,7 @@ static bool device_is_rmrr_locked(struct device *dev)
25732563
if (dev_is_pci(dev)) {
25742564
struct pci_dev *pdev = to_pci_dev(dev);
25752565

2576-
if ((pdev->class >> 8) == PCI_CLASS_SERIAL_USB)
2566+
if (IS_USB_DEVICE(pdev) || IS_GFX_DEVICE(pdev))
25772567
return false;
25782568
}
25792569

‎drivers/iommu/intel_irq_remapping.c

Lines changed: 1 addition & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -637,10 +637,7 @@ static int __init intel_enable_irq_remapping(void)
637637
if (x2apic_supported()) {
638638
eim = !dmar_x2apic_optout();
639639
if (!eim)
640-
printk(KERN_WARNING
641-
"Your BIOS is broken and requested that x2apic be disabled.\n"
642-
"This will slightly decrease performance.\n"
643-
"Use 'intremap=no_x2apic_optout' to override BIOS request.\n");
640+
pr_info("x2apic is disabled because BIOS sets x2apic opt out bit. You can use 'intremap=no_x2apic_optout' to override the BIOS setting.\n");
644641
}
645642

646643
for_each_iommu(iommu, drhd) {

‎include/linux/intel-iommu.h

Lines changed: 15 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -115,10 +115,19 @@ static inline void dmar_writeq(void __iomem *addr, u64 val)
115115
* Extended Capability Register
116116
*/
117117

118-
#define ecap_niotlb_iunits(e) ((((e) >> 24) & 0xff) + 1)
118+
#define ecap_pss(e) ((e >> 35) & 0x1f)
119+
#define ecap_eafs(e) ((e >> 34) & 0x1)
120+
#define ecap_nwfs(e) ((e >> 33) & 0x1)
121+
#define ecap_srs(e) ((e >> 31) & 0x1)
122+
#define ecap_ers(e) ((e >> 30) & 0x1)
123+
#define ecap_prs(e) ((e >> 29) & 0x1)
124+
#define ecap_pasid(e) ((e >> 28) & 0x1)
125+
#define ecap_dis(e) ((e >> 27) & 0x1)
126+
#define ecap_nest(e) ((e >> 26) & 0x1)
127+
#define ecap_mts(e) ((e >> 25) & 0x1)
128+
#define ecap_ecs(e) ((e >> 24) & 0x1)
119129
#define ecap_iotlb_offset(e) ((((e) >> 8) & 0x3ff) * 16)
120-
#define ecap_max_iotlb_offset(e) \
121-
(ecap_iotlb_offset(e) + ecap_niotlb_iunits(e) * 16)
130+
#define ecap_max_iotlb_offset(e) (ecap_iotlb_offset(e) + 16)
122131
#define ecap_coherent(e) ((e) & 0x1)
123132
#define ecap_qis(e) ((e) & 0x2)
124133
#define ecap_pass_through(e) ((e >> 6) & 0x1)
@@ -180,6 +189,9 @@ static inline void dmar_writeq(void __iomem *addr, u64 val)
180189
#define DMA_GSTS_IRES (((u32)1) << 25)
181190
#define DMA_GSTS_CFIS (((u32)1) << 23)
182191

192+
/* DMA_RTADDR_REG */
193+
#define DMA_RTADDR_RTT (((u64)1) << 11)
194+
183195
/* CCMD_REG */
184196
#define DMA_CCMD_ICC (((u64)1) << 63)
185197
#define DMA_CCMD_GLOBAL_INVL (((u64)1) << 61)

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