8000 Merge tag 'drm-fixes-for-v4.7-rc7' of git://people.freedesktop.org/~a… · bsd-unix/linux@1d110cf · GitHub
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Merge tag 'drm-fixes-for-v4.7-rc7' of git://people.freedesktop.org/~airlied/linux
Pull drm fixes from Dave Airlie: "One nouveau fix, and a few AMD Polaris fixes and some Allwinner fixes. I've got some vmware fixes that I might send separate over the weekend, they fix some black screens, but I'm still debating them" * tag 'drm-fixes-for-v4.7-rc7' of git://people.freedesktop.org/~airlied/linux: drm/amd/powerplay: Update CKS on/ CKS off voltage offset calculation. drm/amd/powerplay: fix bug that get wrong polaris evv voltage. drm/amd/powerplay: incorrectly use of the function return value drm/amd/powerplay: fix incorrect voltage table value for tonga drm/amd/powerplay: fix incorrect voltage table value for polaris10 drm/nouveau/disp/sor/gf119: select correct sor when poking training pattern gpu: drm: sun4i_drv: add missing of_node_put after calling of_parse_phandle drm/sun4i: Send vblank event when the CRTC is disabled drm/sun4i: Report proper vblank
2 parents cc23c61 + 39c8859 commit 1d110cf

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-24
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8 files changed

+32
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lines changed

‎drivers/gpu/drm/amd/powerplay/hwmgr/polaris10_hwmgr.c

Lines changed: 15 additions & 17 deletions
Original file line numberDiff line numberDiff line change
@@ -98,7 +98,6 @@
9898
#define PCIE_BUS_CLK 10000
9999
#define TCLK (PCIE_BUS_CLK / 10)
100100

101-
#define CEILING_UCHAR(double) ((double-(uint8_t)(double)) > 0 ? (uint8_t)(double+1) : (uint8_t)(double))
102101

103102
static const uint16_t polaris10_clock_stretcher_lookup_table[2][4] =
104103
{ {600, 1050, 3, 0}, {600, 1050, 6, 1} };
@@ -733,7 +732,7 @@ static int polaris10_populate_smc_mvdd_table(struct pp_hwmgr *hwmgr,
733732
table->Smio[level] |=
734733
data->mvdd_voltage_table.entries[level].smio_low;
735734
}
736-
table->SmioMask2 = data->vddci_voltage_table.mask_low;
735+
table->SmioMask2 = data->mvdd_voltage_table.mask_low;
737736

738737
table->MvddLevelCount = (uint32_t) PP_HOST_TO_SMC_UL(count);
739738
}
@@ -1807,27 +1806,25 @@ static int polaris10_populate_clock_stretcher_data_table(struct pp_hwmgr *hwmgr)
18071806

18081807
ro = efuse * (max -min)/255 + min;
18091808

1810-
/* Populate Sclk_CKS_masterEn0_7 and Sclk_voltageOffset
1811-
* there is a little difference in calculating
1812-
* volt_with_cks with windows */
1809+
/* Populate Sclk_CKS_masterEn0_7 and Sclk_voltageOffset */
18131810
for (i = 0; i < sclk_table->count; i++) {
18141811
data->smc_state_table.Sclk_CKS_masterEn0_7 |=
18151812
sclk_table->entries[i].cks_enable << i;
18161813
if (hwmgr->chip_id == CHIP_POLARIS10) {
1817-
volt_without_cks = (uint32_t)((2753594000 + (sclk_table->entries[i].clk/100) * 136418 -(ro - 70) * 1000000) / \
1814+
volt_without_cks = (uint32_t)((2753594000U + (sclk_table->entries[i].clk/100) * 136418 -(ro - 70) * 1000000) / \
18181815
(2424180 - (sclk_table->entries[i].clk/100) * 1132925/1000));
1819-
volt_with_cks = (uint32_t)((279720200 + sclk_table->entries[i].clk * 3232 - (ro - 65) * 100000000) / \
1820-
(252248000 - sclk_table->entries[i].clk/100 * 115764));
1816+
volt_with_cks = (uint32_t)((2797202000U + sclk_table->entries[i].clk/100 * 3232 - (ro - 65) * 1000000) / \
1817+
(2522480 - sclk_table->entries[i].clk/100 * 115764/100));
18211818
} else {
1822-
volt_without_cks = (uint32_t)((2416794800 + (sclk_table->entries[i].clk/100) * 1476925/10 -(ro - 50) * 1000000) / \
1823-
(2625416 - (sclk_table->entries[i].clk/100) * 12586807/10000));
1824-
volt_with_cks = (uint32_t)((2999656000 + sclk_table->entries[i].clk * 392803/100 - (ro - 44) * 1000000) / \
1825-
(3422454 - sclk_table->entries[i].clk/100 * 18886376/10000));
1819+
volt_without_cks = (uint32_t)((2416794800U + (sclk_table->entries[i].clk/100) * 1476925/10 -(ro - 50) * 1000000) / \
1820+
(2625416 - (sclk_table->entries[i].clk/100) * (12586807/10000)));
1821+
volt_with_cks = (uint32_t)((2999656000U - sclk_table->entries[i].clk/100 * 392803 - (ro - 44) * 1000000) / \
1822+
(3422454 - sclk_table->entries[i].clk/100 * (18886376/10000)));
18261823
}
18271824

18281825
if (volt_without_cks >= volt_with_cks)
1829-
volt_offset = (uint8_t)CEILING_UCHAR((volt_without_cks - volt_with_cks +
1830-
sclk_table->entries[i].cks_voffset) * 100 / 625);
1826+
volt_offset = (uint8_t)(((volt_without_cks - volt_with_cks +
1827+
sclk_table->entries[i].cks_voffset) * 100 + 624) / 625);
18311828

18321829
data->smc_state_table.Sclk_voltageOffset[i] = volt_offset;
18331830
}
@@ -2685,7 +2682,7 @@ static int polaris10_get_evv_voltages(struct pp_hwmgr *hwmgr)
26852682
{
26862683
struct polaris10_hwmgr *data = (struct polaris10_hwmgr *)(hwmgr->backend);
26872684
uint16_t vv_id;
2688-
uint16_t vddc = 0;
2685+
uint32_t vddc = 0;
26892686
uint16_t i, j;
26902687
uint32_t sclk = 0;
26912688
struct phm_ppt_v1_information *table_info =
@@ -2716,8 +2713,9 @@ static int polaris10_get_evv_voltages(struct pp_hwmgr *hwmgr)
27162713
continue);
27172714

27182715

2719-
/* need to make sure vddc is less than 2v or else, it could burn the ASIC. */
2720-
PP_ASSERT_WITH_CODE((vddc < 2000 && vddc != 0),
2716+
/* need to make sure vddc is less than 2v or else, it could burn the ASIC.
2717+
* real voltage level in unit of 0.01mv */
2718+
PP_ASSERT_WITH_CODE((vddc < 200000 && vddc != 0),
27212719
"Invalid VDDC value", result = -EINVAL;);
27222720

27232721
/* the voltage should not be zero nor equal to leakage ID */

‎drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.c

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1256,7 +1256,7 @@ int atomctrl_set_ac_timing_ai(struct pp_hwmgr *hwmgr, uint32_t memory_clock,
12561256
}
12571257

12581258
int atomctrl_get_voltage_evv_on_sclk_ai(struct pp_hwmgr *hwmgr, uint8_t voltage_type,
1259-
uint32_t sclk, uint16_t virtual_voltage_Id, uint16_t *voltage)
1259+
uint32_t sclk, uint16_t virtual_voltage_Id, uint32_t *voltage)
12601260
{
12611261

12621262
int result;
@@ -1274,7 +1274,7 @@ int atomctrl_get_voltage_evv_on_sclk_ai(struct pp_hwmgr *hwmgr, uint8_t voltage_
12741274
if (0 != result)
12751275
return result;
12761276

1277-
*voltage = get_voltage_info_param_space.usVoltageLevel;
1277+
*voltage = ((GET_EVV_VOLTAGE_INFO_OUTPUT_PARAMETER_V1_3 *)(&get_voltage_info_param_space))->ulVoltageLevel;
12781278

12791279
return result;
12801280
}

‎drivers/gpu/drm/amd/powerplay/hwmgr/ppatomctrl.h

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -305,7 +305,7 @@ extern int atomctrl_get_engine_pll_dividers_ai(struct pp_hwmgr *hwmgr, uint32_t
305305
extern int atomctrl_set_ac_timing_ai(struct pp_hwmgr *hwmgr, uint32_t memory_clock,
306306
uint8_t level);
307307
extern int atomctrl_get_voltage_evv_on_sclk_ai(struct pp_hwmgr *hwmgr, uint8_t voltage_type,
308-
uint32_t sclk, uint16_t virtual_voltage_Id, uint16_t *voltage);
308+
uint32_t sclk, uint16_t virtual_voltage_Id, uint32_t *voltage);
309309
extern int atomctrl_get_smc_sclk_range_table(struct pp_hwmgr *hwmgr, struct pp_atom_ctrl_sclk_range_table *table);
310310

311311
extern int atomctrl_get_avfs_information(struct pp_hwmgr *hwmgr, struct pp_atom_ctrl__avfs_parameters *param);

‎drivers/gpu/drm/amd/powerplay/hwmgr/tonga_hwmgr.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1302,7 +1302,7 @@ static int tonga_populate_smc_mvdd_table(struct pp_hwmgr *hwmgr,
13021302
table->Smio[count] |=
13031303
data->mvdd_voltage_table.entries[count].smio_low;
13041304
}
1305-
table->SmioMask2 = data->vddci_voltage_table.mask_low;
1305+
table->SmioMask2 = data->mvdd_voltage_table.mask_low;
13061306

13071307
CONVERT_FROM_HOST_TO_SMC_UL(table->MvddLevelCount);
13081308
}

‎drivers/gpu/drm/amd/powerplay/hwmgr/tonga_processpptables.c

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -302,7 +302,7 @@ static int init_dpm_2_parameters(
302302
(((unsigned long)powerplay_table) + le16_to_cpu(powerplay_table->usPPMTableOffset));
303303

304304
if (0 != powerplay_table->usPPMTableOffset) {
305-
if (1 == get_platform_power_management_table(hwmgr, atom_ppm_table)) {
305+
if (get_platform_power_management_table(hwmgr, atom_ppm_table) == 0) {
306306
phm_cap_set(hwmgr->platform_descriptor.platformCaps,
307307
PHM_PlatformCaps_EnablePlatformPowerManagement);
308308
}

‎drivers/gpu/drm/nouveau/nvkm/engine/disp/sorgf119.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -40,7 +40,8 @@ static int
4040
gf119_sor_dp_pattern(struct nvkm_output_dp *outp, int pattern)
4141
{
4242
struct nvkm_device *device = outp->base.disp->engine.subdev.device;
43-
nvkm_mask(device, 0x61c110, 0x0f0f0f0f, 0x01010101 * pattern);
43+
const u32 soff = gf119_sor_soff(outp);
44+
nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, 0x01010101 * pattern);
4445
return 0;
4546
}
4647

‎drivers/gpu/drm/sun4i/sun4i_crtc.c

Lines changed: 8 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -65,6 +65,14 @@ static void sun4i_crtc_disable(struct drm_crtc *crtc)
6565
DRM_DEBUG_DRIVER("Disabling the CRTC\n");
6666

6767
sun4i_tcon_disable(drv->tcon);
68+
69+
if (crtc->state->event && !crtc->state->active) {
70+
spin_lock_irq(&crtc->dev->event_lock);
71+
drm_crtc_send_vblank_event(crtc, crtc->state->event);
72+
spin_unlock_irq(&crtc->dev->event_lock);
73+
74+
crtc->state->event = NULL;
75+
}
6876
}
6977

7078
static void sun4i_crtc_enable(struct drm_crtc *crtc)

‎drivers/gpu/drm/sun4i/sun4i_drv.c

Lines changed: 2 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -92,7 +92,7 @@ static struct drm_driver sun4i_drv_driver = {
9292
/* Frame Buffer Operations */
9393

9494
/* VBlank Operations */
95-
.get_vblank_counter = drm_vblank_count,
95+
.get_vblank_counter = drm_vblank_no_hw_counter,
9696
.enable_vblank = sun4i_drv_enable_vblank,
9797
.disable_vblank = sun4i_drv_disable_vblank,
9898
};
@@ -310,6 +310,7 @@ static int sun4i_drv_probe(struct platform_device *pdev)
310310

311311
count += sun4i_drv_add_endpoints(&pdev->dev, &match,
312312
pipeline);
313+
of_node_put(pipeline);
313314

314315
DRM_DEBUG_DRIVER("Queued %d outputs on pipeline %d\n",
315316
count, i);

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