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atmel-samd: Add basic support for experimental Metro M0 with an external flash chip.
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/**
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* \file
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*
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* \brief Memory access control configuration file.
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*
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* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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/*
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* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
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*/
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#ifndef _CONF_ACCESS_H_
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#define _CONF_ACCESS_H_
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#include "compiler.h"
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#include "board.h"
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/*! \name Activation of Logical Unit Numbers
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*/
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//! @{
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#define LUN_0 ENABLE //!< On-Chip Virtual Memory.
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#define LUN_1 DISABLE //!< AT45DBX Data Flash.
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#define LUN_2 DISABLE //!< SD/MMC Card over SPI.
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#define LUN_3 DISABLE //!< SD/MMC Card over MCI Slot 0.
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#define LUN_4 DISABLE
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#define LUN_5 DISABLE
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#define LUN_6 DISABLE
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#define LUN_7 DISABLE
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#define LUN_USB DISABLE //!< Host Mass-Storage Memory.
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//! @}
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/*! \name LUN 0 Definitions
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*/
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//! @{
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#define LUN_0_INCLUDE "rom_fs.h"
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#define Lun_0_test_unit_ready rom_fs_test_unit_ready
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#define Lun_0_read_capacity rom_fs_read_capacity
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#define Lun_0_unload NULL /* Can not be unloaded */
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#define Lun_0_wr_protect rom_fs_wr_protect
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#define Lun_0_removal rom_fs_removal
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#define Lun_0_usb_read_10 rom_fs_usb_read_10
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#define Lun_0_usb_write_10 rom_fs_usb_write_10
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#define LUN_0_NAME "\"On-Chip ROM\""
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//! @}
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#define MEM_USB LUN_USB
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/*! \name Actions Associated with Memory Accesses
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*
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* Write here the action to associate with each memory access.
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*
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* \warning Be careful not to waste time in order not to disturb the functions.
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*/
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//! @{
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#define memory_start_read_action(nb_sectors)
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#define memory_stop_read_action()
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#define memory_start_write_action(nb_sectors)
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#define memory_stop_write_action()
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//! @}
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/*! \name Activation of Interface Features
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*/
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//! @{
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#define ACCESS_USB true //!< MEM <-> USB interface.
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#define ACCESS_MEM_TO_RAM false //!< MEM <-> RAM interface.
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#define ACCESS_STREAM false //!< Streaming MEM <-> MEM interface.
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#define ACCESS_STREAM_RECORD false //!< Streaming MEM <-> MEM interface in record mode.
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#define ACCESS_MEM_TO_MEM false //!< MEM <-> MEM interface.
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#define ACCESS_CODEC false //!< Codec interface.
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//! @}
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/*! \name Specific Options for Access Control
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*/
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//! @{
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#define GLOBAL_WR_PROTECT false //!< Management of a global write protection.
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//! @}
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#endif // _CONF_ACCESS_H_
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/**
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* \file
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*
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* \brief User board configuration template
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*
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*/
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/*
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* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
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*/
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#ifndef CONF_BOARD_H
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#define CONF_BOARD_H
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#endif // CONF_BOARD_H
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/**
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* \file
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*
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* \brief SAM D21 Clock configuration
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*
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* Copyright (C) 2014-2015 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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/*
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* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
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< E377 span class=pl-c> */
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#include <clock.h>
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#ifndef CONF_CLOCKS_H_INCLUDED
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# define CONF_CLOCKS_H_INCLUDED
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/* System clock bus configuration */
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# define CONF_CLOCK_CPU_CLOCK_FAILURE_DETECT false
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# define CONF_CLOCK_FLASH_WAIT_STATES 2
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# define CONF_CLOCK_CPU_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
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# define CONF_CLOCK_APBA_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
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# define CONF_CLOCK_APBB_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
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# define CONF_CLOCK_APBC_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
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/* SYSTEM_CLOCK_SOURCE_OSC8M configuration - Internal 8MHz oscillator */
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# define CONF_CLOCK_OSC8M_PRESCALER SYSTEM_OSC8M_DIV_1
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# define CONF_CLOCK_OSC8M_ON_DEMAND true
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# define CONF_CLOCK_OSC8M_RUN_IN_STANDBY false
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/* SYSTEM_CLOCK_SOURCE_XOSC configuration - External clock/oscillator */
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# define CONF_CLOCK_XOSC_ENABLE false
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# define CONF_CLOCK_XOSC_EXTERNAL_CRYSTAL SYSTEM_CLOCK_EXTERNAL_CRYSTAL
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# define CONF_CLOCK_XOSC_EXTERNAL_FREQUENCY 12000000UL
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# define CONF_CLOCK_XOSC_STARTUP_TIME SYSTEM_XOSC_STARTUP_32768
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# define CONF_CLOCK_XOSC_AUTO_GAIN_CONTROL true
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# define CONF_CLOCK_XOSC_ON_DEMAND true
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# define CONF_CLOCK_XOSC_RUN_IN_STANDBY false
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/* SYSTEM_CLOCK_SOURCE_XOSC32K configuration - External 32KHz crystal/clock oscillator */
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# define CONF_CLOCK_XOSC32K_ENABLE true
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# define CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL SYSTEM_CLOCK_EXTERNAL_CRYSTAL
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# define CONF_CLOCK_XOSC32K_STARTUP_TIME SYSTEM_XOSC32K_STARTUP_65536
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# define CONF_CLOCK_XOSC32K_AUTO_AMPLITUDE_CONTROL false
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# define CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT false
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# define CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT true
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# define CONF_CLOCK_XOSC32K_ON_DEMAND false
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# define CONF_CLOCK_XOSC32K_RUN_IN_STANDBY true
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/* SYSTEM_CLOCK_SOURCE_OSC32K configuration - Internal 32KHz oscillator */
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# define CONF_CLOCK_OSC32K_ENABLE false
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# define CONF_CLOCK_OSC32K_STARTUP_TIME SYSTEM_OSC32K_STARTUP_130
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# define CONF_CLOCK_OSC32K_ENABLE_1KHZ_OUTPUT true
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# define CONF_CLOCK_OSC32K_ENABLE_32KHZ_OUTPUT true
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# define CONF_CLOCK_OSC32K_ON_DEMAND true
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# define CONF_CLOCK_OSC32K_RUN_IN_STANDBY false
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/* SYSTEM_CLOCK_SOURCE_DFLL configuration - Digital Frequency Locked Loop */
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# define CONF_CLOCK_DFLL_ENABLE true
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# define CONF_CLOCK_DFLL_LOOP_MODE SYSTEM_CLOCK_DFLL_LOOP_MODE_CLOSED
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# define CONF_CLOCK_DFLL_ON_DEMAND true
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/* DFLL open loop mode configuration */
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# define CONF_CLOCK_DFLL_FINE_VALUE (512)
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/* DFLL closed loop mode configuration */
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# define CONF_CLOCK_DFLL_SOURCE_GCLK_GENERATOR GCLK_GENERATOR_1
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# define CONF_CLOCK_DFLL_MULTIPLY_FACTOR (48000000 / 32768)
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# define CONF_CLOCK_DFLL_QUICK_LOCK true
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# define CONF_CLOCK_DFLL_TRACK_AFTER_FINE_LOCK true
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# define CONF_CLOCK_DFLL_KEEP_LOCK_ON_WAKEUP true
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# define CONF_CLOCK_DFLL_ENABLE_CHILL_CYCLE true
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# define CONF_CLOCK_DFLL_MAX_COARSE_STEP_SIZE (0x1f / 4)
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# define CONF_CLOCK_DFLL_MAX_FINE_STEP_SIZE (0xff / 4)
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/* SYSTEM_CLOCK_SOURCE_DPLL configuration - Digital Phase-Locked Loop */
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# define CONF_CLOCK_DPLL_ENABLE false
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# define CONF_CLOCK_DPLL_ON_DEMAND true
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# define CONF_CLOCK_DPLL_RUN_IN_STANDBY false
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# define CONF_CLOCK_DPLL_LOCK_BYPASS false
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# define CONF_CLOCK_DPLL_WAKE_UP_FAST false
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# define CONF_CLOCK_DPLL_LOW_POWER_ENABLE false
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# define CONF_CLOCK_DPLL_LOCK_TIME SYSTEM_CLOCK_SOURCE_DPLL_LOCK_TIME_DEFAULT
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# define CONF_CLOCK_DPLL_REFERENCE_CLOCK SYSTEM_CLOCK_SOURCE_DPLL_REFERENCE_CLOCK_XOSC32K
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# define CONF_CLOCK_DPLL_FILTER SYSTEM_CLOCK_SOURCE_DPLL_FILTER_DEFAULT
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# define CONF_CLOCK_DPLL_REFERENCE_FREQUENCY 32768
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# define CONF_CLOCK_DPLL_REFERENCE_DIVIDER 1
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# define CONF_CLOCK_DPLL_OUTPUT_FREQUENCY 48000000
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/* DPLL GCLK reference configuration */
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# define CONF_CLOCK_DPLL_REFERENCE_GCLK_GENERATOR GCLK_GENERATOR_1
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/* DPLL GCLK lock timer configuration */
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# define CONF_CLOCK_DPLL_LOCK_GCLK_GENERATOR GCLK_GENERATOR_1
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/* Set this to true to configure the GCLK when running clocks_init. If set to
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* false, none of the GCLK generators will be configured in clocks_init(). */
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# define CONF_CLOCK_CONFIGURE_GCLK true
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/* Configure GCLK generator 0 (Main Clock) */
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# define CONF_CLOCK_GCLK_0_ENABLE true
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# define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY true
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# define CONF_CLOCK_GCLK_0_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_DFLL
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# define CONF_CLOCK_GCLK_0_PRESCALER 1
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# define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE false
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/* Configure GCLK generator 1 */
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# define CONF_CLOCK_GCLK_1_ENABLE true
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# define CONF_CLOCK_GCLK_1_RUN_IN_STANDBY false
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# define CONF_CLOCK_GCLK_1_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_XOSC32K
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# define CONF_CLOCK_GCLK_1_PRESCALER 1
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# define CONF_CLOCK_GCLK_1_OUTPUT_ENABLE true
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/* Configure GCLK generator 2 (RTC) */
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# define CONF_CLOCK_GCLK_2_ENABLE false
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# define CONF_CLOCK_GCLK_2_RUN_IN_STANDBY false
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# define CONF_CLOCK_GCLK_2_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC32K
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# define CONF_CLOCK_GCLK_2_PRESCALER 32
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# define CONF_CLOCK_GCLK_2_OUTPUT_ENABLE false
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/* Configure GCLK generator 3 */
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# define CONF_CLOCK_GCLK_3_ENABLE true
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# define CONF_CLOCK_GCLK_3_RUN_IN_STANDBY false
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# define CONF_CLOCK_GCLK_3_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
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# define CONF_CLOCK_GCLK_3_PRESCALER 1
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# define CONF_CLOCK_GCLK_3_OUTPUT_ENABLE false
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/* Configure GCLK generator 4 */
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# define CONF_CLOCK_GCLK_4_ENABLE false
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# define CONF_CLOCK_GCLK_4_RUN_IN_STANDBY false
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# define CONF_CLOCK_GCLK_4_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
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# define CONF_CLOCK_GCLK_4_PRESCALER 1
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# define CONF_CLOCK_GCLK_4_OUTPUT_ENABLE false
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/* Configure GCLK generator 5 */
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# define CONF_CLOCK_GCLK_5_ENABLE false
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# define CONF_CLOCK_GCLK_5_RUN_IN_STANDBY false
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# define CONF_CLOCK_GCLK_5_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
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# define CONF_CLOCK_GCLK_5_PRESCALER 1
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# define CONF_CLOCK_GCLK_5_OUTPUT_ENABLE false
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/* Configure GCLK generator 6 */
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# define CONF_CLOCK_GCLK_6_ENABLE false
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# define CONF_CLOCK_GCLK_6_RUN_IN_STANDBY false
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# define CONF_CLOCK_GCLK_6_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
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# define CONF_CLOCK_GCLK_6_PRESCALER 1
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# define CONF_CLOCK_GCLK_6_OUTPUT_ENABLE false
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/* Configure GCLK generator 7 */
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# define CONF_CLOCK_GCLK_7_ENABLE false
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# define CONF_CLOCK_GCLK_7_RUN_IN_STANDBY false
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# define CONF_CLOCK_GCLK_7_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
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# define CONF_CLOCK_GCLK_7_PRESCALER 1
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# define CONF_CLOCK_GCLK_7_OUTPUT_ENABLE false
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/* Configure GCLK generator 8 */
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# define CONF_CLOCK_GCLK_8_ENABLE false
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# define CONF_CLOCK_GCLK_8_RUN_IN_STANDBY false
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# define CONF_CLOCK_GCLK_8_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC8M
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# define CONF_CLOCK_GCLK_8_PRESCALER 1
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# define CONF_CLOCK_GCLK_8_OUTPUT_ENABLE false
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#endif /* CONF_CLOCKS_H_INCLUDED */
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/**
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* \file
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*
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* \brief Sleep manager configuration
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*
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* Copyright (c) 2014-2015 Atmel Corporation. All rights reserved.
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*
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* \asf_license_start
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*
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* \page License
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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*
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* 1. Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the following disclaimer.
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*
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* 2. Redistributions in binary form must reproduce the above copyright notice,
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* this list of conditions and the following disclaimer in the documentation
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* and/or other materials provided with the distribution.
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*
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* 3. The name of Atmel may not be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* 4. This software may only be redistributed and used in connection with an
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* Atmel microcontroller product.
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*
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* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
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* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
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* ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*
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* \asf_license_stop
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*
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*/
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/*
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* Support and FAQ: visit <a href="http://www.atmel.com/design-support/">Atmel Support</a>
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*/
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#ifndef CONF_SLEEPMGR_H_INCLUDED
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#define CONF_SLEEPMGR_H_INCLUDED
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#define CONFIG_SLEEPMGR_ENABLE
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#endif /* CONF_SLEEPMGR_H_INCLUDED */

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