8000 added cmake for lpc54, update lpc55 · arduino/tinyusb@6d877c3 · GitHub
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hathachhathach
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added cmake for lpc54, update lpc55
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9 files changed

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‎hw/bsp/lpc54/boards/lpcxpresso54608/board.h

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/*
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* The MIT License (MIT)
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*
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* Copyright (c) 2021, Ha Thach (tinyusb.org)
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*
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* This file is part of the TinyUSB stack.
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*/
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#ifndef BOARD_LPCXPRESSO54608_H_
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#define BOARD_LPCXPRESSO54608_H_
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#ifdef __cplusplus
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extern "C" {
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#endif
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// LED
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#define LED_PORT 2
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#define LED_PIN 2
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#define LED_STATE_ON 0
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// WAKE button
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#define BUTTON_PORT 1
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#define BUTTON_PIN 1
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#define BUTTON_STATE_ACTIVE 0
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// UART
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#define UART_DEV USART0
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#define UART_RX_PINMUX 0, 29, IOCON_PIO_DIG_FUNC1_EN
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#define UART_TX_PINMUX 0, 30, IOCON_PIO_DIG_FUNC1_EN
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// USB0 VBUS
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#define USB0_VBUS_PINMUX 0, 22, IOCON_PIO_DIG_FUNC7_EN
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// XTAL
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//#define XTAL0_CLK_HZ (16 * 1000 * 1000U)
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#ifdef __cplusplus
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}
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#endif
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#endif

‎hw/bsp/lpc54/boards/lpcxpresso54608/board.mk

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MCU_VARIANT = LPC54608
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MCU_CORE = LPC54608
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PORT ?= 1
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CFLAGS += -DCPU_LPC54608J512ET180
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CFLAGS += -Wno-error=double-promotion
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LD_FILE = $(MCU_DIR)/gcc/LPC54608J512_flash.ld
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LIBS += $(TOP)/$(MCU_DIR)/gcc/libpower_hardabi.a
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JLINK_DEVICE = LPC54608J512
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PYOCD_TARGET = LPC54608
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#flash: flash-pyocd
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flash: flash-jlink

‎hw/bsp/lpc54/boards/lpcxpresso54628/board.cmake

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set(MCU_VARIANT LPC54628)
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set(MCU_CORE LPC54628)
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set(JLINK_DEVICE LPC54628J512)
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set(PYOCD_TARGET LPC54628)
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set(NXPLINK_DEVICE LPC54628:LPCXpresso54628)
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set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/LPC54628J512_flash.ld)
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# Device port default to PORT1 Highspeed
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if (NOT DEFINED PORT)
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set(PORT 1)
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endif()
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function(update_board TARGET)
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target_compile_definitions(${TARGET} PUBLIC
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CPU_LPC54628J512ET180
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)
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target_link_libraries(${TARGET} PUBLIC
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${SDK_DIR}/devices/${MCU_VARIANT}/gcc/libpower_hardabi.a
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)
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endfunction()

‎hw/bsp/lpc54/family.cmake

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include_guard()
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if (NOT BOARD)
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message(FATAL_ERROR "BOARD not specified")
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endif ()
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set(SDK_DIR ${TOP}/hw/mcu/nxp/mcux-sdk)
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set(CMSIS_DIR ${TOP}/lib/CMSIS_5)
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# include board specific
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include(${CMAKE_CURRENT_LIST_DIR}/boards/${BOARD}/board.cmake)
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# toolchain set up
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set(CMAKE_SYSTEM_PROCESSOR cortex-m4 CACHE INTERNAL "System Processor")
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set(CMAKE_TOOLCHAIN_FILE ${TOP}/tools/cmake/toolchain/arm_${TOOLCHAIN}.cmake)
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set(FAMILY_MCUS LPC54 CACHE INTERNAL "")
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if (NOT DEFINED PORT)
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set(PORT 0)
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endif()
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# Host port will be the other port if available
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set(HOST_PORT $<NOT:${PORT}>)
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#------------------------------------
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# BOARD_TARGET
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#------------------------------------
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# only need to be built ONCE for all examples
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function(add_board_target BOARD_TARGET)
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if (NOT TARGET ${BOARD_TARGET})
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add_library(${BOARD_TARGET} STATIC
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# driver
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${SDK_DIR}/drivers/lpc_gpio/fsl_gpio.c
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${SDK_DIR}/drivers/common/fsl_common_arm.c
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${SDK_DIR}/drivers/flexcomm/fsl_flexcomm.c
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${SDK_DIR}/drivers/flexcomm/fsl_usart.c
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# mcu
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${SDK_DIR}/devices/${MCU_VARIANT}/system_${MCU_CORE}.c
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_clock.c
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_power.c
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers/fsl_reset.c
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)
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target_compile_definitions(${BOARD_TARGET} PUBLIC
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CFG_TUSB_MEM_ALIGN=TU_ATTR_ALIGNED\(64\)
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BOARD_TUD_RHPORT=${PORT}
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BOARD_TUH_RHPORT=${HOST_PORT}
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)
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# Port 0 is Fullspeed, Port 1 is Highspeed. Port1 controller can only access USB_SRAM
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if (PORT EQUAL 1)
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target_compile_definitions(${BOARD_TARGET} PUBLIC
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BOARD_TUD_MAX_SPEED=OPT_MODE_HIGH_SPEED
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BOARD_TUH_MAX_SPEED=OPT_MODE_FULL_SPEED
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CFG_TUD_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
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)
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else ()
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target_compile_definitions(${BOARD_TARGET} PUBLIC
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BOARD_TUD_MAX_SPEED=OPT_MODE_FULL_SPEED
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BOARD_TUH_MAX_SPEED=OPT_MODE_HIGH_SPEED
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CFG_TUH_MEM_SECTION=__attribute__\(\(section\(\"m_usb_global\"\)\)\)
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)
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endif ()
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target_include_directories(${BOARD_TARGET} PUBLIC
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${TOP}/lib/sct_neopixel
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# driver
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${SDK_DIR}/drivers/common
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${SDK_DIR}/drivers/flexcomm
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${SDK_DIR}/drivers/lpc_iocon
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${SDK_DIR}/drivers/lpc_gpio
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${SDK_DIR}/drivers/lpuart
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${SDK_DIR}/drivers/sctimer
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# mcu
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${CMSIS_DIR}/CMSIS/Core/Include
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${SDK_DIR}/devices/${MCU_VARIANT}
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${SDK_DIR}/devices/${MCU_VARIANT}/drivers
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)
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update_board(${BOARD_TARGET})
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if (NOT DEFINED LD_FILE_${CMAKE_C_COMPILER_ID})
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set(LD_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/${MCU_CORE}_flash.ld)
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endif ()
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if (NOT DEFINED STARTUP_FILE_${CMAKE_C_COMPILER_ID})
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set(STARTUP_FILE_GNU ${SDK_DIR}/devices/${MCU_VARIANT}/gcc/startup_${MCU_CORE}.S)
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endif ()
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target_sources(${BOARD_TARGET} PUBLIC
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${STARTUP_FILE_${CMAKE_C_COMPILER_ID}}
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)
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if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
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target_link_options(${BOARD_TARGET} PUBLIC
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# linker file
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"LINKER:--script=${LD_FILE_GNU}"
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# nanolib
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--specs=nosys.specs
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--specs=nano.specs
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)
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elseif (CMAKE_C_COMPILER_ID STREQUAL "IAR")
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target_link_options(${BOARD_TARGET} PUBLIC
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"LINKER:--config=${LD_FILE_IAR}"
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)
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endif ()
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endif ()
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endfunction()
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#------------------------------------
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# Functions
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#------------------------------------
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function(family_configure_example TARGET RTOS)
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family_configure_common(${TARGET} ${RTOS})
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# Board target
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add_board_target(board_${BOARD})
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#---------- Port Specific ----------
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# These files are built for each example since it depends on example's tusb_config.h
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target_sources(${TARGET} PUBLIC
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# BSP
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}/family.c
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../board.c
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# external driver
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${TOP}/lib/sct_neopixel/sct_neopixel.c
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)
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# https://github.com/gsteiert/sct_neopixel/pull/1
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if (CMAKE_C_COMPILER_ID STREQUAL "GNU")
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set_source_files_properties(${TOP}/lib/sct_neopixel/sct_neopixel.c PROPERTIES
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COMPILE_FLAGS "-Wno-unused-parameter")
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endif ()
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target_include_directories(${TARGET} PUBLIC
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# family, hw, board
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}/../../
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${CMAKE_CURRENT_FUNCTION_LIST_DIR}/boards/${BOARD}
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)
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# Add TinyUSB target and port source
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family_add_tinyusb(${TARGET} OPT_MCU_LPC54 ${RTOS})
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target_sources(${TARGET}-tinyusb PUBLIC
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${TOP}/src/portable/nxp/lpc_ip3511/dcd_lpc_ip3511.c
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)
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target_link_libraries(${TARGET}-tinyusb PUBLIC board_${BOARD})
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# Link dependencies
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target_link_libraries(${TARGET} PUBLIC board_${BOARD} ${TARGET}-tinyusb)
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# Flashing
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family_flash_jlink(${TARGET})
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#family_flash_nxplink(${TARGET})
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#family_flash_pyocd(${TARGET})
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endfunction()

‎hw/bsp/lpc55/boards/double_m33_express/board.cmake

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set(LD_FILE_GNU ${CMAKE_CURRENT_LIST_DIR}/LPC55S69_cm33_core0_uf2.ld)
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# Device port default to PORT1 Highspeed
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if (NOT DEFINED PORT)
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set(PORT 1)
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endif()
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function(update_board TARGET)
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target_compile_definitions(${TARGET} PUBLIC
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CPU_LPC55S69JBD100_cm33_core0
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# port 1 is highspeed
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BOARD_TUD_RHPORT=1
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)
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endfunction()

‎hw/bsp/lpc55/boards/lpcxpresso55s28/board.cmake

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set(PYOCD_TARGET LPC55S28)
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set(NXPLINK_DEVICE LPC55S28:LPCXpresso55S28)
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# Device port default to PORT1 Highspeed
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if (NOT DEFINED PORT)
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set(PORT 1)
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endif()
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function(update_board TARGET)
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target_compile_definitions(${TARGET} PUBLIC
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CPU_LPC55S28JBD100

‎hw/bsp/lpc55/boards/lpcxpresso55s69/board.cmake

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set(PYOCD_TARGET LPC55S69)
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set(NXPLINK_DEVICE LPC55S69:LPCXpresso55S69)
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# Device port default to PORT1 Highspeed
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if (NOT DEFINED PORT)
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set(PORT 1)
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endif()
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function(update_board TARGET)
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target_compile_definitions(${TARGET} PUBLIC
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CPU_LPC55S69JBD100_cm33_core0
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# port 1 is highspeed
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# BOARD_TUD_RHPORT=1
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)
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endfunction()

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