8000 drop OTA partition on 4MB Espressif boards; retune modules by dhalbert · Pull Request #10265 · adafruit/circuitpython · GitHub
[go: up one dir, main page]

Skip to content

drop OTA partition on 4MB Espressif boards; retune modules #10265

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Draft
wants to merge 1 commit into
base: main
Choose a base branch
from

Conversation

dhalbert
Copy link
Collaborator
@dhalbert dhalbert commented Apr 16, 2025

Change the 4MB Espressif builds to use a partition table with a single larger app partition ('ota0'), dropping the second app partition used for possible OTA.

Drop some module omissions on a number of boards. Some boards still have espcamera turned off, since it requires a lot of pins. But those could be looked at again.

This is a draft PR for now until we get the documentation for upgrading the boards squared away.

I turned on _bleio on ESP32. It sort of works, but is dropping some bytes when sending back bytes when testing with ble_uart_echo_test.py. I'll open an issue for this.

The UF2's built by this must be used with https://github.com/adafruit/tinyuf2/releases/tag/0.30.0 or later.

@dhalbert dhalbert force-pushed the espressif-4mb-no-ota branch 2 times, most recently from 2e9d81d to b502ede Compare April 17, 2025 01:48
@eightycc
Copy link
Collaborator

Since this is freeing up flash space, it could be a good time to change optimization flags for Espressif RISC-V builds from -Os to -O2 and turn -DDEBUG on again for debug builds:

#Debugging/Optimization
ifeq ($(DEBUG), 1)
CFLAGS += -ggdb
ifeq ($(IDF_TARGET_ARCH),riscv)
OPTIMIZATION_FLAGS ?= -Os
CFLAGS += -DNDEBUG
else
OPTIMIZATION_FLAGS ?= -Og
CFLAGS += -DDEBUG
endif
# You may want to enable these flags to make setting breakpoints easier.
# CFLAGS += -fno-inline -fno-ipa-sra
else
CFLAGS += -DNDEBUG
# RISC-V is larger than xtensa
# Use -Os for RISC-V when it overflows
ifeq ($(IDF_TARGET_ARCH),riscv)
OPTIMIZATION_FLAGS ?= -Os
else
OPTIMIZATION_FLAGS ?= -O2
endif
endif

Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment
Labels
None yet
Projects
None yet
2 participants
0