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#define MEM_SLICE_HASH_MASK (v ) (GET_BITFIELD(v, 6, 19) << 6)
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#define MEM_SLICE_HASH_LSB_MASK_BIT (v ) GET_BITFIELD(v, 24, 26)
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- static const struct res_config {
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+ static struct res_config {
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bool machine_check ;
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/* The number of present memory controllers. */
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int num_imc ;
@@ -479,7 +479,7 @@ static u64 rpl_p_err_addr(u64 ecclog)
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return ECC_ERROR_LOG_ADDR45 (ecclog );
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}
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- static const struct res_config ehl_cfg = {
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+ static struct res_config ehl_cfg = {
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.num_imc = 1 ,
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.imc_base = 0x5000 ,
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.ibecc_base = 0xdc00 ,
@@ -489,7 +489,7 @@ static const struct res_config ehl_cfg = {
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.err_addr_to_imc_addr = ehl_err_addr_to_imc_addr ,
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};
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- static const struct res_config icl_cfg = {
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+ static struct res_config icl_cfg = {
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.num_imc = 1 ,
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.imc_base = 0x5000 ,
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.ibecc_base = 0xd800 ,
@@ -499,7 +499,7 @@ static const struct res_config icl_cfg = {
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.err_addr_to_imc_addr = ehl_err_addr_to_imc_addr ,
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};
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- static const struct res_config tgl_cfg = {
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+ static struct res_config tgl_cfg = {
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.machine_check = true,
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.num_imc = 2 ,
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.imc_base = 0x5000 ,
@@ -513,7 +513,7 @@ static const struct res_config tgl_cfg = {
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.err_addr_to_imc_addr = tgl_err_addr_to_imc_addr ,
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};
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- static const struct res_config adl_cfg = {
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+ static struct res_config adl_cfg = {
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.machine_check = true,
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.num_imc = 2 ,
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.imc_base = 0xd800 ,
@@ -524,7 +524,7 @@ static const struct res_config adl_cfg = {
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.err_addr_to_imc_addr = adl_err_addr_to_imc_addr ,
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};
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- static const struct res_config adl_n_cfg = {
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+ static struct res_config adl_n_cfg = {
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.machine_check = true,
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.num_imc = 1 ,
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.imc_base = 0xd800 ,
@@ -535,7 +535,7 @@ static const struct res_config adl_n_cfg = {
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.err_addr_to_imc_addr = adl_err_addr_to_imc_addr ,
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};
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- static const struct res_config rpl_p_cfg = {
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+ static struct res_config rpl_p_cfg = {
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.machine_check = true,
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.num_imc = 2 ,
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.imc_base = 0xd800 ,
@@ -547,7 +547,7 @@ static const struct res_config rpl_p_cfg = {
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.err_addr_to_imc_addr = adl_err_addr_to_imc_addr ,
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};
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- static const struct res_config mtl_ps_cfg = {
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+ static struct res_config mtl_ps_cfg = {
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.machine_check = true,
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.num_imc = 2 ,
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.imc_base = 0xd800 ,
@@ -558,7 +558,7 @@ static const struct res_config mtl_ps_cfg = {
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.err_addr_to_imc_addr = adl_err_addr_to_imc_addr ,
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};
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- static const struct res_config mtl_p_cfg = {
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+ static struct res_config mtl_p_cfg = {
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.machine_check = true,
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.num_imc = 2 ,
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.imc_base = 0xd800 ,
@@ -569,7 +569,7 @@ static const struct res_config mtl_p_cfg = {
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.err_addr_to_imc_addr = adl_err_addr_to_imc_addr ,
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};
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- static const struct pci_device_id igen6_pci_tbl [] = {
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+ static struct pci_device_id igen6_pci_tbl [] = {
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{ PCI_VDEVICE (INTEL , DID_EHL_SKU5 ), (kernel_ulong_t )& ehl_cfg },
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{ PCI_VDEVICE (INTEL , DID_EHL_SKU6 ), (kernel_ulong_t )& ehl_cfg },
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{ PCI_VDEVICE (INTEL , DID_EHL_SKU7 ), (kernel_ulong_t )& ehl_cfg },
@@ -1350,9 +1350,11 @@ static int igen6_register_mcis(struct pci_dev *pdev, u64 mchbar)
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return - ENODEV ;
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}
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- if (lmc < res_cfg -> num_imc )
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+ if (lmc < res_cfg -> num_imc ) {
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igen6_printk (KERN_WARNING , "Expected %d mcs, but only %d detected." ,
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res_cfg -> num_imc , lmc );
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+ res_cfg -> num_imc = lmc ;
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+ }
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return 0 ;
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