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‎NetFPGA-PLUS.html

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<button class="card-title" ><h2>Details &nbsp</h2></button>
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<div id="collapse-PLUS1" class="collapse show" data-parent="#accordion-PLUS1">
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<p>NetFPGA Plus provides a platform for rapid prototying of networking projects. It provides a combination of open-source code, community, and contributions over a number of the Xilinx <a href="https://www.xilinx.com/products/boards-and-kits/alveo.html" >Alveo</a> FPGA cards. To make users' development experience quick and easy, PLUS offers the NetFPGA reference projecs, test/measurement environment, and expereince using different Xilinx UltraScale+ FPGA. The NetFPGA project makes extensive use of the Vivado development environment and draws features from the <a href="https://github.com/Xilinx/open-nic-shell" ><i>OpenNic Shell</i></a>, including PCIe-DMA interfaces and the CMAC/100GbE physical Ethernet interfaces.</p>
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<p>Current targets (as at May 2021) are the Alveo U200, Alveo U250, Alveo U280 and the older Xilinx VCU1525 Acceleration Development Kit. Common features of these target boards is the use of the UltraScale+ FPGA along with dual 100GbE ports, x16 gen3 PCIe HBA (host bus adapter) interface. Communitty ports to new targets are also keenly encouraged</p>
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<p>NetFPGA Plus can be used as a smart NIC (network interface card), layer2 switch, IP router, test/measurement environment, firewall, network functions prototyping environment, and more. A number of reference projects are included as standard</p>
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<p>The NetFPGA PLUS is a code base built for the Xilinx Alveo Data Center Accelerator Card based upon Xilinx Virtex Ultrascale+ FPGAs. The code base currently operates on the U200, U250 and U280 as well as the discontinued <a href="https://www.xilinx.com/products/boards-and-kits/vcu1525-a.html">VCU1525 Acceleration Development Kit.</a></p>
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<p>A typical Alveo board is an FPGA-based PCI Express board with I/O capabilities for 10 and 100 Gbps operation, an x16 gen3 PCIe adapter card. It can be used as NIC, multiport switch, firewall, test/mesaurement environment, and more.</p>
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<p>Full feature lists are available at the <a href="https://www.xilinx.com/products/boards-and-kits/alveo.html">Xilinx Alveo website</a>.</p>
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<p>Example feaures (e.g., U250)</p>
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<ul>
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<li>Field Programmable Gate Array</li>
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<ul>
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<li>Xilinx Ultrascale+ VCU250</li>
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<li>1,728K logic cells</li>
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<li>57MB block RAM</li>
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<li>Fully programmable by the user</li>
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</ul>
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<li>100-Gigabit Ethernet networking ports</li>
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<ul>
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<li>Connector bloack on left of PCB interfaces to 2 QSFP+ ports</li>
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<li>Directly connected to the FPGA.</li>
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<li>Wire-speed processing on all ports at all time using FPGA logic.</li>
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</ul>
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<li>Double-Data Rate Random Access Memory (DDR4 DRAM)</li>
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<ul>
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<li>4x 16GB 72b DIMM DDR4</li>
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<li>933MHz clock (2400MT/s)</li>
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<li>77 GB/s peak memory throughput</li>
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</ul>
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<li>PCI Express Gen. 3</li>
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<ul>
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<li>Third generation PCI Express interface, 8Gbps/lane</li>
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<li>16 lanes (x16)</li>
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<li>Hard IP</li>
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<li>Provides CPU access to memory-mapped registers and memory on the NetFPGA hardware</li>
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</ul>
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<li>Storage</li>
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<ul>
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<li>FLASH devices</li>
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</ul>
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<li>Standard PCIe Form Factor</li>
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<li>Standard PCIe card</li>
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<li>3/4 or Full length, full height</li>
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</ul>
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<li>Flexible, Open-source code</li>
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</ul>
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‎why-NetFPGA.html

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<h1>Why NetFPGA</h1>
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<p>The NetFPGA enables researchers and students to build working prototypes of high-speed, hardware-accelerated networking systems. The NetFPGA has been used in the classroom to teach students how to build Ethernet switches and Internet Protocol (IP) routers that use hardware rather than software to forward packets. The NetFPGA hardware can be used by researchers to prototype new types of clean-slate services for next-generation networks. The NetFPGA supports multiple usage models each allowing a user to build a hardware-accelerate router with as little or as much customization as they desire.</p>

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