8000 cmsis_uart: use CMSIS UART driver for kl27z · ARMmbed/DAPLink@4e213a2 · GitHub
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mbrossardmbrossard
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cmsis_uart: use CMSIS UART driver for kl27z
1 parent 068fbb3 commit 4e213a2

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19 files changed

+8424
-420
lines changed

19 files changed

+8424
-420
lines changed

‎records/hic_hal/kl27z.yaml

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -21,6 +21,7 @@ common:
2121
- source/hic_hal/freescale
2222
- source/hic_hal/freescale/kl27z
2323
- source/hic_hal/freescale/kl27z/MKL27Z4
24+
- source/hic_hal/cmsis-driver/uart
2425
fsl_flash_driver:
2526
- source/hic_hal/freescale/iap
2627

‎source/board/microbitv2/IO_Config_Override.h

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -147,21 +147,21 @@ COMPILER_ASSERT(DAPLINK_HIC_ID == DAPLINK_HIC_ID_KL27Z);
147147
// Target Running LED Not available
148148

149149
// UART
150-
#define UART_PORT PORTA
151-
#define UART_NUM (1)
152-
// RX PTA18
153-
#define PIN_UART_RX_GPIO PTA
150+
151+
// UART RX PTA18
152+
#define PIN_UART_RX_PORT PORTA
154153
#define PIN_UART_RX_BIT (18)
155154
#define PIN_UART_RX (1<<PIN_UART_RX_BIT)
156-
#define PIN_UART_RX_MUX_ALT (3)
157-
// TX PTA19
158-
#define PIN_UART_TX_GPIO PTA
155+
#define PIN_UART_RX_MUX_ALT (kPORT_MuxAlt3)
156+
// UART TX PTA19
157+
#define PIN_UART_TX_PORT PORTA
159158
#define PIN_UART_TX_BIT (19)
160159
#define PIN_UART_TX (1<<PIN_UART_TX_BIT)
161-
#define PIN_UART_TX_MUX_ALT (3)
160+
#define PIN_UART_TX_MUX_ALT (kPORT_MuxAlt3)
162161

163-
#define UART LPUART1
164-
#define UART_RX_TX_IRQn LPUART1_IRQn
165-
#define UART_RX_TX_IRQHandler LPUART1_IRQHandler
162+
// cmsis-driver/uart/uart.c configuration
163+
#include "fsl_lpuart_cmsis.h"
164+
#define CMSIS_UART_INSTANCE (Driver_USART1)
165+
#define CMSIS_UART_IRQ (LPUART1_IRQn)
166166

167167
#endif

‎source/board/microbitv2/i2c_commands.c

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -29,6 +29,7 @@
2929
#include "pwr_mon.h"
3030
#include "power.h"
3131
#include "microbitv2.h"
32+
#include "util.h"
3233

3334
/* I2C source clock */
3435
#define I2C_SLAVE_BASEADDR I2C1

‎source/board/microbitv2/power.c

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,7 @@ void PORTCD_IRQHandler(void)
7979
if ((1U << PIN_WAKE_ON_EDGE_BIT) & PORT_GetPinsInterruptFlags(PIN_WAKE_ON_EDGE_PORT))
8080
{
8181
PORT_ClearPinsInterruptFlags(PIN_WAKE_ON_EDGE_PORT, (1U << PIN_WAKE_ON_EDGE_BIT));
82-
82+
8383
power_source = pwr_mon_get_power_source();
8484

8585
bool usb_on = (((PIN_WAKE_ON_EDGE_GPIO->PDIR) >> PIN_WAKE_ON_EDGE_BIT) & 0x01U) ? false : true;
@@ -102,7 +102,7 @@ void power_init(void)
102102
{
103103
// Configure pin as GPIO
104104
PORT_SetPinMux(PIN_WAKE_ON_EDGE_PORT, PIN_WAKE_ON_EDGE_BIT, kPORT_MuxAsGpio);
105-
105+
106106
/* Power related. */
107107
SMC_SetPowerModeProtection(SMC, kSMC_AllowPowerModeAll);
108108
if (kRCM_SourceWakeup & RCM_GetPreviousResetSources(RCM)) /* Wakeup from VLLS. */
10000
@@ -191,22 +191,22 @@ static void power_mode_switch(smc_power_state_t curPowerState, app_power_mode_t
191191
static void power_pre_switch_hook(smc_power_state_t originPowerState, app_power_mode_t targetMode)
192192
{
193193
/* Wait for debug console output finished. */
194-
while (!(LPUART_STAT_TC_MASK & UART->STAT))
194+
while (!(LPUART_STAT_TC_MASK & LPUART1->STAT))
195195
{
196196
}
197197
uart_uninitialize();
198198

199199
/* Disable pins to lower current leakage */
200-
PORT_SetPinMux(UART_PORT, PIN_UART_RX_BIT, kPORT_PinDisabledOrAnalog);
201-
PORT_SetPinMux(UART_PORT, PIN_UART_TX_BIT, kPORT_PinDisabledOrAnalog);
200+
PORT_SetPinMux(PIN_UART_RX_PORT, PIN_UART_RX_BIT, kPORT_PinDisabledOrAnalog);
201+
PORT_SetPinMux(PIN_UART_TX_PORT, PIN_UART_TX_BIT, kPORT_PinDisabledOrAnalog);
202202
PORT_SetPinMux(PIN_HID_LED_PORT, PIN_HID_LED_BIT, kPORT_PinDisabledOrAnalog);
203-
203+
204204
/* Disable I/O pin SWCLK */
205205
PIN_SWCLK_PORT->PCR[PIN_SWCLK_BIT] = 0;
206-
206+
207207
/* Disable I/O pin SWDIO */
208208
PIN_SWDIO_PORT->PCR[PIN_SWDIO_BIT] = 0;
209-
209+
210210
/* If targetMode is VLLS0, disable I2C pins */
211211
if (kAPP_PowerModeVlls0 == targetMode)
212212
{
@@ -229,10 +229,10 @@ static void power_post_switch_hook(smc_power_state_t originPowerState, app_power
229229
PIN_SWDIO_PORT->PCR[PIN_SWDIO_BIT] = PORT_PCR_MUX(1) | /* GPIO */
230230
PORT_PCR_PE_MASK | /* Pull enable */
231231
PORT_PCR_PS_MASK; /* Pull-up */
232-
232+
233233
/* re-configure pinmux of disabled pins */
234-
PORT_SetPinMux(UART_PORT, PIN_UART_RX_BIT, (port_mux_t)PIN_UART_RX_MUX_ALT);
235-
PORT_SetPinMux(UART_PORT, PIN_UART_TX_BIT, (port_mux_t)PIN_UART_TX_MUX_ALT);
234+
PORT_SetPinMux(PIN_UART_RX_PORT, PIN_UART_RX_BIT, PIN_UART_RX_MUX_ALT);
235+
PORT_SetPinMux(PIN_UART_TX_PORT, PIN_UART_TX_BIT, PIN_UART_TX_MUX_ALT);
236236

237237
uart_initialize();
238238
i2c_deinitialize();

‎source/hic_hal/freescale/kl27z/IO_Config.h

Lines changed: 9 additions & 9 deletions
Original file line numberDiff line numberDiff line change
@@ -92,21 +92,21 @@ COMPILER_ASSERT(DAPLINK_HIC_ID == DAPLINK_HIC_ID_KL27Z);
9292
#define SW_RESET_NOT_PRESSED (1)
9393

9494
// UART
95-
#define UART_PORT PORTA
96-
#define UART_NUM (1)
97-
// RX PTA18
98-
#define PIN_UART_RX_GPIO PTA
95+
96+
// UART RX PTA18
97+
#define PIN_UART_RX_PORT PORTA
9998
#define PIN_UART_RX_BIT (18)
10099
#define PIN_UART_RX (1<<PIN_UART_RX_BIT)
101100
#define PIN_UART_RX_MUX_ALT (3)
102-
// TX PTA19
103-
#define PIN_UART_TX_GPIO PTA
101+
// UART TX PTA19
102+
#define PIN_UART_TX_PORT PORTA
104103
#define PIN_UART_TX_BIT (19)
105104
#define PIN_UART_TX (1<<PIN_UART_TX_BIT)
106105
#define PIN_UART_TX_MUX_ALT (3)
107106

108-
#define UART LPUART1
109-
#define UART_RX_TX_IRQn LPUART1_IRQn
110-
#define UART_RX_TX_IRQHandler LPUART1_IRQHandler
107+
// cmsis-driver/uart/uart.c configuration
108+
#include "fsl_lpuart_cmsis.h"
109+
#define CMSIS_UART_INSTANCE (Driver_USART1)
110+
#define CMSIS_UART_IRQ (LPUART1_IRQn)
111111

112112
#endif

‎source/hic_hal/freescale/kl27z/MKL27Z4/fsl_clock.c

Lines changed: 46 additions & 61 deletions
Original file line numberDiff line numberDiff line change
@@ -75,16 +75,19 @@ static uint8_t CLOCK_GetOscRangeFromFreq(uint32_t freq);
7575
static uint32_t CLOCK_GetLircClkFreq(void)
7676
{
7777
static const uint32_t lircFreqs[] = {MCG_LIRC_FREQ1, MCG_LIRC_FREQ2};
78+
uint32_t freq;
7879

7980
/* Check whether the LIRC is enabled. */
80-
if ((MCG->C1 & MCG_C1_IRCLKEN_MASK) || (kMCGLITE_ClkSrcLirc == MCG_S_CLKST_VAL))
81+
if (((MCG->C1 & MCG_C1_IRCLKEN_MASK) != 0U) || ((uint8_t)kMCGLITE_ClkSrcLirc == MCG_S_CLKST_VAL))
8182
{
82-
return lircFreqs[MCG_C2_IRCS_VAL];
83+
freq = lircFreqs[MCG_C2_IRCS_VAL];
8384
}
8485
else
8586
{
86-
return 0U;
87+
freq = 0U;
8788
}
89+
90+
return freq;
8891
}
8992

9093
static uint8_t CLOCK_GetOscRangeFromFreq(uint32_t freq)
@@ -114,16 +117,20 @@ static uint8_t CLOCK_GetOscRangeFromFreq(uint32_t freq)
114117
*/
115118
uint32_t CLOCK_GetOsc0ErClkFreq(void)
116119
{
117-
if (OSC0->CR & OSC_CR_ERCLKEN_MASK)
120+
uint32_t freq;
121+
122+
if ((OSC0->CR & OSC_CR_ERCLKEN_MASK) != 0U)
118123
{
119124
/* Please call CLOCK_SetXtal0Freq base on board setting before using OSC0 clock. */
120125
assert(g_xtal0Freq);
121-
return g_xtal0Freq;
126+
freq = g_xtal0Freq;
122127
}
123128
else
124129
{
125-
return 0U;
130+
freq = 0U;
126131
}
132+
133+
return freq;
127134
}
128135

129136
/*!
@@ -162,7 +169,7 @@ uint32_t CLOCK_GetEr32kClkFreq(void)
162169
*/
163170
uint32_t CLOCK_GetPlatClkFreq(void)
164171
{
165-
return CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1);
172+
return CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1U);
166173
}
167174

168175
/*!
@@ -174,8 +181,8 @@ uint32_t CLOCK_GetFlashClkFreq(void)
174181
{
175182
uint32_t freq;
176183

177-
freq = CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1);
178-
freq /= (SIM_CLKDIV1_OUTDIV4_VAL + 1);
184+
freq = CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1U);
185+
freq /= (SIM_CLKDIV1_OUTDIV4_VAL + 1U);
179186

180187
return freq;
181188
}
@@ -189,8 +196,8 @@ uint32_t CLOCK_GetBusClkFreq(void)
189196
{
190197
uint32_t freq;
191198

192-
freq = CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1);
193-
freq /= (SIM_CLKDIV1_OUTDIV4_VAL + 1);
199+
freq = CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1U);
200+
freq /= (SIM_CLKDIV1_OUTDIV4_VAL + 1U);
194201

195202
return freq;
196203
}
@@ -202,7 +209,7 @@ uint32_t CLOCK_GetBusClkFreq(void)
202209
*/
203210
uint32_t CLOCK_GetCoreSysClkFreq(void)
204211
{
205-
return CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1);
212+
return CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1U);
206213
}
207214

208215
/*!
@@ -223,12 +230,12 @@ uint32_t CLOCK_GetFreq(clock_name_t clockName)
223230
{
224231
case kCLOCK_CoreSysClk:
225232
case kCLOCK_PlatClk:
226-
freq = CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1);
233+
freq = CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1U);
227234
break;
228235
case kCLOCK_BusClk:
229236
case kCLOCK_FlashClk:
230-
freq = CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1);
231-
freq /= (SIM_CLKDIV1_OUTDIV4_VAL + 1);
237+
freq = CLOCK_GetOutClkFreq() / (SIM_CLKDIV1_OUTDIV1_VAL + 1U);
238+
freq /= (SIM_CLKDIV1_OUTDIV4_VAL + 1U);
232239
break;
233240
case kCLOCK_Er32kClk:
234241
freq = CLOCK_GetEr32kClkFreq();
@@ -326,15 +333,19 @@ uint32_t CLOCK_GetInternalRefClkFreq(void)
326333
*/
327334
uint32_t CLOCK_GetPeriphClkFreq(void)
328335
{
336+
uint32_t freq;
337+
329338
/* Check whether the HIRC is enabled. */
330-
if ((MCG->MC & MCG_MC_HIRCEN_MASK) || (kMCGLITE_ClkSrcHirc == MCG_S_CLKST_VAL))
339+
if (((MCG->MC & MCG_MC_HIRCEN_MASK) != 0U) || ((uint8_t)kMCGLITE_ClkSrcHirc == MCG_S_CLKST_VAL))
331340
{
332-
return MCG_HIRC_FREQ;
341+
freq = MCG_HIRC_FREQ;
333342
}
334343
else
335344
{
336-
return 0U;
345+
freq = 0U;
337346
}
347+
348+
return freq;
338349
}
339350

340351
/*!
@@ -351,13 +362,13 @@ uint32_t CLOCK_GetOutClkFreq(void)
351362

352363
switch (MCG_S_CLKST_VAL)
353364
{
354-
case kMCGLITE_ClkSrcHirc:
365+
case (uint8_t)kMCGLITE_ClkSrcHirc:
355366
freq = MCG_HIRC_FREQ;
356367
break;
357-
case kMCGLITE_ClkSrcLirc:
368+
case (uint8_t)kMCGLITE_ClkSrcLirc:
358369
freq = CLOCK_GetLircClkFreq() >> MCG_SC_FCRDIV_VAL;
359370
break;
360-
case kMCGLITE_ClkSrcExt:
371+
case (uint8_t)kMCGLITE_ClkSrcExt:
361372
/* Please call CLOCK_SetXtal0Freq base on board setting before using OSC0 clock. */
362373
assert(g_xtal0Freq);
363374
freq = g_xtal0Freq;
@@ -383,11 +394,11 @@ mcglite_mode_t CLOCK_GetMode(void)
383394

384395
8000 switch (MCG_S_CLKST_VAL)
385396
{
386-
case kMCGLITE_ClkSrcHirc: /* HIRC */
397+
case (uint8_t)kMCGLITE_ClkSrcHirc: /* HIRC */
387398
mode = kMCGLITE_ModeHirc48M;
388399
break;
389-
case kMCGLITE_ClkSrcLirc: /* LIRC */
390-
if (kMCGLITE_Lirc2M == MCG_C2_IRCS_VAL)
400+
case (uint8_t)kMCGLITE_ClkSrcLirc: /* LIRC */
401+
if ((uint8_t)kMCGLITE_Lirc2M == MCG_C2_IRCS_VAL)
391402
{
392403
mode = kMCGLITE_ModeLirc2M;
393404
}
@@ -396,7 +407,7 @@ mcglite_mode_t CLOCK_GetMode(void)
396407
mode = kMCGLITE_ModeLirc8M;
397408
}
398409
break;
399-
case kMCGLITE_ClkSrcExt: /* EXT */
410+
case (uint8_t)kMCGLITE_ClkSrcExt: /* EXT */
400411
mode = kMCGLITE_ModeExt;
401412
break;
402413
default:
@@ -424,34 +435,34 @@ status_t CLOCK_SetMcgliteConfig(mcglite_config_t const *targetConfig)
424435
* If switch between LIRC8M and LIRC2M, need to switch to HIRC mode first,
425436
* because could not switch directly.
426437
*/
427-
if ((kMCGLITE_ClkSrcLirc == MCG_S_CLKST_VAL) && (kMCGLITE_ClkSrcLirc == targetConfig->outSrc) &&
428-
(MCG_C2_IRCS_VAL != targetConfig->ircs))
438+
if (((uint8_t)kMCGLITE_ClkSrcLirc == MCG_S_CLKST_VAL) && (kMCGLITE_ClkSrcLirc == targetConfig->outSrc) &&
439+
(MCG_C2_IRCS_VAL != (uint8_t)(targetConfig->ircs)))
429440
{
430-
MCG->C1 = (MCG->C1 & ~MCG_C1_CLKS_MASK) | MCG_C1_CLKS(kMCGLITE_ClkSrcHirc);
431-
while (kMCGLITE_ClkSrcHirc != MCG_S_CLKST_VAL)
441+
MCG->C1 = (uint8_t)((MCG->C1 & ~MCG_C1_CLKS_MASK) | MCG_C1_CLKS(kMCGLITE_ClkSrcHirc));
442+
while ((uint8_t)kMCGLITE_ClkSrcHirc != MCG_S_CLKST_VAL)
432443
{
433444
}
434445
}
435446

436447
/* Set configuration now. */
437448
MCG->SC = MCG_SC_FCRDIV(targetConfig->fcrdiv);
438449
MCG->MC = MCG_MC_HIRCEN(targetConfig->hircEnableInNotHircMode) | MCG_MC_LIRC_DIV2(targetConfig->lircDiv2);
439-
MCG->C2 = (MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs);
450+
MCG->C2 = (uint8_t)((MCG->C2 & ~MCG_C2_IRCS_MASK) | MCG_C2_IRCS(targetConfig->ircs));
440451
MCG->C1 = MCG_C1_CLKS(targetConfig->outSrc) | targetConfig->irclkEnableMode;
441452

442453
/*
443454
* If external oscillator used and MCG_Lite is set to EXT mode, need to
444455
* wait for the OSC stable.
445456
*/
446-
if ((MCG->C2 & MCG_C2_EREFS0_MASK) && (kMCGLITE_ClkSrcExt == targetConfig->outSrc))
457+
if (((MCG->C2 & MCG_C2_EREFS0_MASK) != 0U) && (kMCGLITE_ClkSrcExt == targetConfig->outSrc))
447458
{
448-
while (!(MCG->S & MCG_S_OSCINIT0_MASK))
459+
while (0U == (MCG->S & MCG_S_OSCINIT0_MASK))
449460
{
450461
}
451462
}
452463

453464
/* Wait for clock source change completed. */
454-
while (targetConfig->outSrc != MCG_S_CLKST_VAL)
465+
while ((uint8_t)targetConfig->outSrc != MCG_S_CLKST_VAL)
455466
{
456467
}
457468

@@ -474,10 +485,10 @@ void CLOCK_InitOsc0(osc_config_t const *config)
474485

475486
MCG->C2 = ((MCG->C2 & MCG_C2_IRCS_MASK) | MCG_C2_RANGE0(range) | (uint8_t)config->workMode);
476487

477-
if ((kOSC_ModeExt != config->workMode) && (OSC0->CR & OSC_CR_ERCLKEN_MASK))
488+
if ((kOSC_ModeExt != config->workMode) && ((OSC0->CR & OSC_CR_ERCLKEN_MASK) != 0U))
478489
{
479490
/* Wait for stable. */
480-
while (!(MCG->S & MCG_S_OSCINIT0_MASK))
491+
while (0U == (MCG->S & MCG_S_OSCINIT0_MASK))
481492
{
482493
}
483494
}
@@ -493,29 +504,3 @@ void CLOCK_DeinitOsc0(void)
493504
OSC0->CR = 0U;
494505
MCG->C2 &= MCG_C2_IRCS_MASK;
495506
}
496-
497-
/*!
498-
* brief Delay at least for several microseconds.
499-
* Please note that, this API will calculate the microsecond period with the maximum devices
500-
* supported CPU frequency, so this API will only delay for at least the given microseconds, if precise
501-
* delay count was needed, please implement a new timer count to achieve this function.
502-
*
503-
* param delay_us Delay time in unit of microsecond.
504-
*/
505-
__attribute__((weak)) void SDK_DelayAtLeastUs(uint32_t delay_us)
506-
{
507-
assert(0U != delay_us);
508-
509-
uint32_t count = (uint32_t)USEC_TO_COUNT(delay_us, SDK_DEVICE_MAXIMUM_CPU_CLOCK_FREQUENCY);
510-
511-
/*
512-
* Calculate the real delay count depend on the excute instructions cycles,
513-
* users can change the divider value to adapt to the real IDE optimise level.
514-
*/
515-
count = (count / 4U);
516-
517-
for (; count > 0UL; count--)
518-
{
519-
__NOP();
520-
}
521-
}

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