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# | Part: | Description: | Manuf. | Package | Pins | T°min | T°max | PDF size |
1. | SN74LS107AD | DUAL J-K FLIP-FLOPS WITH CLEAR | TI | D | 14 | 0°C | 70°C | 197K |
2. | SN74LS107ADR | DUAL J-K FLIP-FLOPS WITH CLEAR | TI | D | 14 | 0°C | 70°C | 197K |
3. | SN74LS107AN | DUAL J-K FLIP-FLOPS WITH CLEAR | TI | N | 14 | 0°C | 70°C | 197K |
4. | SN74LS107AN3 | DUAL J-K FLIP-FLOPS WITH CLEAR | TI | N | 14 | 0°C | 70°C | 197K |
5. | SN74LS109AD | Dual JK Positive Edge-Triggered Flip-Flop | ON | SOIC | 16 | - | - | 96K |
6. | SN74LS109AD | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET | TI | D | 16 | 0°C | 70°C | 271K |
7. | SN74LS109AD | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET | TI | D | 16 | 0°C | 70°C | 271K |
8. | SN74LS109ADR | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET | TI | D | 16 | 0°C | 70°C | 271K |
9. | SN74LS109AM | Dual JK Positive Edge-Triggered Flip-Flop | ON | - | - | - | - | 96K |
10. | SN74LS109AMEL | Dual JK Positive Edge-Triggered Flip-Flop | ON | - | - | - | - | 96K |
11. | SN74LS109AML1 | Dual JK Positive Edge-Triggered Flip-Flop | ON | - | - | - | - | 96K |
12. | SN74LS109AN | Dual JK Positive Edge-Triggered Flip-Flop | ON | PDIP | 16 | - | - | 96K |
13. | SN74LS109AN | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET | TI | N | 16 | 0°C | 70°C | 271K |
14. | SN74LS109AN3 | DUAL J-K POSITIVE-EDGE-TRIGGERED FLIP-FLOPS WITH CLEAR AND PRESET | TI | N | 16 | 0°C | 70°C | 271K |
15. | SN74LS10D | TRIPLE 3-INPUT NAND GATE | ON | SOIC | 14 | - | - | 33K |
16. | SN74LS10D | TRIPLE 3-INPUT POSITIVE-NAND GATES | TI | D | 14 | 0°C | 70°C | 192K |
17. | SN74LS10DR | TRIPLE 3-INPUT POSITIVE-NAND GATES | TI | D | 14 | 0°C | 70°C | 192K |
18. | SN74LS10N | TRIPLE 3-INPUT POSITIVE-NAND GATES | TI | N | 14 | 0°C | 70°C | 192K |
19. | SN74LS10N3 | TRIPLE 3-INPUT POSITIVE-NAND GATES | TI | N | 14 | 0°C | 70°C | 192K |
20. | SN74LS10NSR | TRIPLE 3-INPUT POSITIVE-NAND GATES | TI | NS | 14 | 0°C | 70°C | 192K |