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| rowspan=2 {{rh}} colspan=3 | 3D engine{{efn|[[Unified shader model|Unified shaders]] : [[texture mapping unit]]s : [[render output unit]]s}} || Up to 400:20:8 || colspan=2 | Up to 384:24:6 || colspan=4 | Up to 512:32:8 || colspan=2 | Up to 704:44:16<ref>{{cite news |last1=Cutress |first1=Ian |title=Zen Cores and Vega: Ryzen APUs for AM4 – AMD Tech Day at CES: 2018 Roadmap Revealed, with Ryzen APUs, Zen+ on 12nm, Vega on 7nm |url=https://www.anandtech.com/show/12233/amd-tech-day-at-ces-2018-roadmap-revealed-with-ryzen-apus-zen-on-12nm-vega-on-7nm/3 |access-date=7 February 2018 |publisher=Anandtech |date=1 February 2018}}</ref> || colspan=2 | Up to 512:32:8 || 768:48:8 || 128:?:? || 80:8:4 || colspan=3 | 128:8:4 || Up to 192:12:8 || Up to 192:12:4 || 192:12:4 || Up to 512:?:? || 128:?:?
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| colspan=3 | IOMMUv1 ||
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| {{rh}} colspan=3 | Video decoder || colspan=3 | [[Unified Video Decoder#UVD 3|UVD 3.0]] || colspan=2 | [[Unified Video Decoder#UVD 4.2|UVD 4.2]] || colspan=2 | [[Unified Video Decoder#UVD 6|UVD 6.0]] || rowspan=2 colspan=2 | [[Video Core Next|VCN]] 1.0<ref>{{cite news |last1=Larabel |first1=Michael |title=Radeon VCN Encode Support Lands in Mesa 17.4 Git |url=https://www.phoronix.com/scan.php?page=news_item&px=Radeon-VCN-Encode-Lands |access-date=20 November 2017 |publisher=Phoronix |date=17 November 2017}}</ref> || rowspan="2" | VCN 2.1<ref name="wccftechCezanne">{{cite web|last=|first=|date=Aug 12, 2021|title=AMD Ryzen 5000G ‘Cezanne’ APU Gets First High-Res Die Shots, 10.7 Billion Transistors In A 180mm2 Package|url=https://wccftech.com/amd-ryzen-5000g-cezanne-apu-first-high-res-die-shots-10-7-billion-transistors/|url-status=live|access-date=August 25, 2021|website=wccftech|quote=}}</ref>
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