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John A. Chandy
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- affiliation: University of Connecticut, USA
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2020 – today
- 2023
- [j30]Paul A. Wortman, John A. Chandy:
Translation of AADL model to security attack tree (TAMSAT) to SMART evaluation of monetary security risk. Inf. Secur. J. A Glob. Perspect. 32(4): 297-313 (2023) - 2022
- [j29]Paul A. Wortman, John A. Chandy:
A framework for evaluating security risk in system design. Discov. Internet Things 2(1) (2022) - [c60]Jason Dejesus, John A. Chandy:
Cache Locking and Encryption to Prevent Memory Snooping in Embedded Systems. DSC 2022: 1-8 - [c59]Nicholas Chan, John A. Chandy:
Extracting Vulnerabilities from GitHub Commits. SANER 2022: 235-239 - 2020
- [j28]Paul A. Wortman, John A. Chandy:
SMART: security model adversarial risk-based tool for systems security design evaluation. J. Cybersecur. 6(1): tyaa003 (2020) - [c58]Wei Yan, Fatemeh Tehranipoor, Xuan Zhang, John A. Chandy:
FLASH: FPGA Locality-Aware Sensitive Hash for Nearest Neighbor Search and Clustering Application. FPL 2020: 249-253 - [c57]Wei Yan, Huifeng Zhu, Zhiyuan Yu, Fatemeh Tehranipoor, John A. Chandy, Ning Zhang, Xuan Zhang:
Bit2RNG: Leveraging Bad-page Initialized Table with Bit-error Insertion for True Random Number Generation in Commodity Flash Memory. HOST 2020: 91-101 - [c56]Md Shahed Enamul Quadir, John A. Chandy:
Embedded Systems Authentication and Encryption Using Strong PUF Modeling. ICCE 2020: 1-6 - [c55]Paul A. Wortman, John A. Chandy:
A Trace-Based Study of SMB Network File System Workloads in an Academic Enterprise. SPECTS 2020: 1-8 - [c54]Paul A. Wortman, Fatemeh Tehranipoor, John A. Chandy:
Exploring the Coverage of Existing Hardware Vulnerabilities in Community Standards. SVCC 2020: 87-97
2010 – 2019
- 2019
- [j27]Md Shahed Enamul Quadir, John A. Chandy:
Key Generation for Hardware Obfuscation Using Strong PUFs. Cryptogr. 3(3): 17 (2019) - [j26]Supriya Karmakar, John A. Chandy, Faquir C. Jain:
Eight-bit ADC using non-volatile flash memory. IET Circuits Devices Syst. 13(1): 98-102 (2019) - [c53]Michael P. Kapralos, John A. Chandy:
HOTMeTaL: Hardware Optimization Tool for Memory Table and Logic Conversion. FPGA 2019: 307-308 - 2018
- [j25]Wei Yan, John A. Chandy:
Phase Calibrated Ring Oscillator PUF Design and Application. Comput. 7(3): 40 (2018) - [j24]Nikolaos Athanasios Anagnostopoulos, Stefan Katzenbeisser, John A. Chandy, Fatemeh Tehranipoor:
An Overview of DRAM-Based Security Primitives. Cryptogr. 2(2): 7 (2018) - [j23]Paul A. Wortman, Wei Yan, John A. Chandy, Fatemeh Tehranipoor:
P2M-based security model: security enhancement using combined PUF and PRNG models for authenticating consumer electronic devices. IET Comput. Digit. Tech. 12(6): 289-296 (2018) - [j22]Fatemeh Tehranipoor, Paul A. Wortman, Nima Karimian, Wei Yan, John A. Chandy:
DVFT: A Lightweight Solution for Power-Supply Noise-Based TRNG Using Dynamic Voltage Feedback Tuning System. IEEE Trans. Very Large Scale Integr. Syst. 26(6): 1084-1097 (2018) - [c52]Paul A. Wortman, Fatemeh Tehranipoor, John A. Chandy:
An Adversarial Risk-based Approach for Network Architecture Security Modeling and Design. Cyber Security 2018: 1-8 - [c51]Chujiao Ma, John A. Chandy:
Error Tolerant ASCA on FPGA. ICCCS (3) 2018: 563-572 - [c50]Fatemeh Tehranipoor, Nima Karimian, Paul A. Wortman, John A. Chandy:
Low-cost authentication paradigm for consumer electronics within the internet of wearable fitness tracking applications. ICCE 2018: 1-6 - 2017
- [j21]Chujiao Ma, John A. Chandy, Zhijie Shi:
Algebraic Side-Channel Attack on Twofish. J. Internet Serv. Inf. Secur. 7(2): 32-43 (2017) - [j20]Wei Yan, Fatemeh Tehranipoor, John A. Chandy:
PUF-Based Fuzzy Authentication Without Error Correcting Codes. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(9): 1445-1457 (2017) - [j19]Fatemeh Tehranipoor, Nima Karimian, Wei Yan, John A. Chandy:
DRAM-Based Intrinsic Physically Unclonable Functions for System-Level Security and Authentication. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 1085-1097 (2017) - [c49]Paul A. Wortman, Fatemeh Tehranipoor, Nima Karimian, John A. Chandy:
Proposing a modeling framework for minimizing security vulnerabilities in IoT systems in the healthcare domain. BHI 2017: 185-188 - [c48]Chujiao Ma, John A. Chandy, Laurent Michel, Fanghui Liu, Waldemar Cruz:
Influence of Error on Hamming Weights for ASCA. Inscrypt 2017: 447-460 - [c47]Wei Yan, Chenglu Jin, Fatemeh Tehranipoor, John A. Chandy:
Phase calibrated ring oscillator PUF design and implementation on FPGAs. FPL 2017: 1-8 - [c46]Fatemeh Tehranipoor, Nima Karimian, Wei Yan, John A. Chandy:
Investigation of DRAM PUFs reliability under device accelerated aging effects. ISCAS 2017: 1-4 - [c45]Charles Eckert, Fatemeh Tehranipoor, John A. Chandy:
DRNG: DRAM-based random number generation using its startup value behavior. MWSCAS 2017: 1260-1263 - [c44]Wei Yan, Daniel Fontaine, John A. Chandy, Laurent Michel:
A design flow with integrated verification of requirements and faults in safety-critical systems. SoSE 2017: 1-6 - [c43]Fatemeh Tehranipoor, Nima Karimian, Wei Yan, John A. Chandy:
A Study of Power Supply Variation as a Source of Random Noise. VLSID 2017: 155-160 - 2016
- [j18]Cengiz Karakoyunlu, John A. Chandy:
Exploiting user metadata for energy-aware node allocation in a cloud storage system. J. Comput. Syst. Sci. 82(2): 282-309 (2016) - [j17]Shahed E. Quadir, Junlin Chen, Domenic Forte, Navid Asadizanjani, Sina Shahbazmohamadi, Lei Wang, John A. Chandy, Mark M. Tehranipoor:
A Survey on Chip to System Reverse Engineering. ACM J. Emerg. Technol. Comput. Syst. 13(1): 6:1-6:34 (2016) - [j16]Cengiz Karakoyunlu, John A. Chandy, Alma Riska:
Adding data analytics capabilities to scaled-out object store. J. Syst. Softw. 121: 16-27 (2016) - [c42]Fatemeh Tehranipoor, Wei Yan, John A. Chandy:
Robust hardware true random number generators using DRAM remanence effects. HOST 2016: 79-84 - 2015
- [j15]Janardhan Singaraju, Ajithkumar Thamarakuzhi, John A. Chandy:
Active storage networks: Using embedded computation in the network switch for cluster data processing. Future Gener. Comput. Syst. 45: 149-160 (2015) - [j14]Supriya Karmakar, John A. Chandy, Faquir C. Jain:
Unipolar Logic Gates Based on Spatial Wave-Function Switched FETs. IEEE Trans. Very Large Scale Integr. Syst. 23(4): 609-618 (2015) - [c41]Fatemeh Tehranipoor, Nima Karimian, Kan Xiao, John A. Chandy:
DRAM based Intrinsic Physical Unclonable Functions for System Level Security. ACM Great Lakes Symposium on VLSI 2015: 15-20 - [c40]Wei Yan, Fatemeh Tehranipoor, John A. Chandy:
A Novel Way to Authenticate Untrusted Integrated Circuits. ICCAD 2015: 132-138 - [c39]Rohit K. Mehta, John A. Chandy:
Leveraging checkpoint/restore to optimize utilization of cloud compute resources. LCN Workshops 2015: 714-721 - 2014
- [j13]Supriya Karmakar, John A. Chandy, Faquir C. Jain:
Implementation of Six Bit ADC and DAC Using Quantum Dot Gate Non-Volatile Memory. J. Signal Process. Syst. 75(3): 209-216 (2014) - [c38]Orko Momin, Cengiz Karakoyunlu, Michael T. Runde, John A. Chandy:
Creating a programmable object storage stack. PSFW@HPDC 2014: 3-10 - [c37]Cengiz Karakoyunlu, Michael T. Runde, John A. Chandy:
Using an Object-Based Active Storage Framework to Improve Parallel Storage Systems. ICPP Workshops 2014: 70-78 - 2013
- [j12]Supriya Karmakar, John A. Chandy, Faquir C. Jain:
Design of Ternary Logic Combinational Circuits Based on Quantum Dot Gate FETs. IEEE Trans. Very Large Scale Integr. Syst. 21(5): 793-806 (2013) - [c36]Cengiz Karakoyunlu, John A. Chandy:
Optimizations on the Parallel Virtual File System implementation integrated with Object-Based Storage Devices. CLUSTER 2013: 1-5 - [c35]Orko Momin, John A. Chandy:
An object interface storage node for clustered file systems. CLUSTER 2013: 1-5 - 2012
- [c34]Cengiz Karakoyunlu, John A. Chandy:
Techniques for an energy aware parallel file system. IGCC 2012: 1-5 - [c33]Michael T. Runde, Wesley G. Stevens, Paul A. Wortman, John A. Chandy:
An active storage framework for object storage devices. MSST 2012: 1-12 - [c32]Philip H. Carns, Kevin Harms, Dries Kimpe, Robert B. Ross, Justin M. Wozniak, Lee Ward, Matthew L. Curry, Ruth Klundt, Geoff Danielson, Cengiz Karakoyunlu, John A. Chandy, Bradley Settlemeyer, William Gropp:
A Case for Optimistic Coordination in HPC Storage Systems. SC Companion 2012: 48-53 - 2011
- [j11]Ajithkumar Thamarakuzhi, John A. Chandy:
2-Dilated flattened butterfly: A nonblocking switching topology for high-radix networks. Comput. Commun. 34(15): 1822-1835 (2011) - [c31]Janardhan Singaraju, John A. Chandy:
Active Storage Networks for Accelerating K-Means Data Clustering. ARC 2011: 102-109 - 2010
- [j10]Sumit Narayan, John A. Chandy:
ATTEST: ATTributes-based Extendable STorage. J. Syst. Softw. 83(4): 548-556 (2010) - [c30]Ajithkumar Thamarakuzhi, John A. Chandy:
2-dilated flattened butterfly: A nonblocking switching network. HPSR 2010: 153-158 - [c29]Sumit Narayan, John A. Chandy:
Extendable storage framework for reliable clustered storage systems. IPDPS Workshops 2010: 1-4 - [c28]Janardhan Singaraju, John A. Chandy:
Parallel Data Sort Using Networked FPGAs. ReConFig 2010: 214-219
2000 – 2009
- 2009
- [c27]John A. Chandy:
An analysis of resource costs in a public computing grid. IPDPS 2009: 1-8 - [c26]Anuradharthi Thiruvenkata Ramani, John A. Chandy:
An Analysis of Parallel Programming Techniques for Data Intensive Computation. PDPTA 2009: 373-379 - 2008
- [j9]Janardhan Singaraju, John A. Chandy:
FPGA based string matching for network processing applications. Microprocess. Microsystems 32(4): 210-222 (2008) - [j8]John A. Chandy:
RAID0.5: design and implementation of a low cost disk array data protection method. J. Supercomput. 46(2): 108-123 (2008) - [c25]Tina Miriam John, Anuradharthi Thiruvenkata Ramani, John A. Chandy:
Active storage using object-based devices. CLUSTER 2008: 472-478 - [c24]John A. Chandy, Faquir C. Jain:
Multiple Valued Logic Using 3-State Quantum Dot Gate FETs. ISMVL 2008: 186-190 - 2007
- [j7]John A. Chandy:
Dual actuator logging disk architecture and modeling. J. Syst. Archit. 53(12): 913-926 (2007) - [j6]John A. Chandy, Sumit Narayan:
Reliability tradeoffs in personal storage systems. ACM SIGOPS Oper. Syst. Rev. 41(1): 37-41 (2007) - 2006
- [j5]Long Bu, John A. Chandy:
A CAM-based keyword match processor architecture. Microelectron. J. 37(8): 828-836 (2006) - [c23]John A. Chandy:
Storage Allocation in Unreliable Peer-to-Peer Systems. DSN 2006: 227-236 - [c22]Janardhan Singaraju, John A. Chandy:
A Generic Lookup Cache Architecture for Network Processing Applications. ERSA 2006: 247-248 - [c21]Janardhan Singaraju, John A. Chandy:
A generic lookup cache architecture for network processing applications. FPGA 2006: 233 - [c20]John A. Chandy:
RAID0.5: Active Data Replication for Low Cost Disk Array Data Protection. PDPTA 2006: 963-969 - 2005
- [c19]Janardhan Singaraju, Long Bu, John A. Chandy:
A Signature Match Processor Architecture for Network Intrusion Detection. FCCM 2005: 235-242 - [c18]Michael P. Kapralos, John A. Chandy:
A Quorum Based Content Delivery Architecture. PDPTA 2005: 991-996 - 2004
- [c17]Long Bu, John A. Chandy:
FPGA Based Network Intrusion Detection using Content Addressable Memories. FCCM 2004: 316-317 - [c16]Long Bu, John A. Chandy:
A keyword match processor architecture using content addressable memory. ACM Great Lakes Symposium on VLSI 2004: 372-376 - [c15]John A. Chandy:
Parity Redundancy Strategies in a Large Scale Distributed Storage System. MSST 2004: 185-191 - 2003
- [c14]Jonathan D. Bright, John A. Chandy:
A Scalable Architecture for Clustered Network Attached Storage. IEEE Symposium on Mass Storage Systems 2003: 196-206 - [c13]Jonathan D. Bright, John A. Chandy:
Data Integrity in a Distributed Storage System. PDPTA 2003: 688-694
1990 – 1999
- 1999
- [j4]John A. Chandy, Prithviraj Banerjee:
A Parallel Circuit-Partitioned Algorithm for Timing-Driven Standard Cell Placement. J. Parallel Distributed Comput. 57(1): 64-90 (1999) - 1998
- [c12]Dhruva R. Chakrabarti, Pramod G. Joisha, John A. Chandy, Krishnaswamy Krishnaswamy, Venkatram Krishnaswamy, Prithviraj Banerjee:
WADE: a Web-based automated parallel CAD environment. HiPC 1998: 473-480 - 1997
- [j3]John A. Chandy, Sungho Kim, Balkrishna Ramkumar, Steven Parkes, Prithviraj Banerjee:
An evaluation of parallel simulated annealing strategies with application to standard cell placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(4): 398-410 (1997) - [c11]John A. Chandy, Prithviraj Banerjee:
A Parallel Circuit-Partitioned Algorithm for Timing Driven Cell Placement. ICCD 1997: 621-627 - [c10]John G. Holm, John A. Chandy, Steven Parkes, Sumit Roy, Venkatram Krishnaswamy, Gagan Hasteer, Prithviraj Banerjee:
Performance Evaluation of Message-Driven Parallel VLSI CAD Applications on General Purpose Multiprocessors. International Conference on Supercomputing 1997: 172-179 - [c9]Zhaoyun Xing, John A. Chandy, Prithviraj Banerjee:
Parallel Global Routing Algorithms for Standard Cells. IPPS 1997: 527- - 1996
- [c8]John A. Chandy, Steven Parkes, Prithviraj Banerjee:
Distributed Object Oriented Data Structures and Algorithms for VLSI CAD. IRREGULAR 1996: 147-158 - [c7]John A. Chandy, Prithviraj Banerjee:
Parallel simulated annealing strategies for VLSI cell placement. VLSI Design 1996: 37-42 - 1995
- [j2]Prithviraj Banerjee, John A. Chandy, Manish Gupta, Eugene W. Hodges IV, John G. Holm, Antonio Lain, Daniel J. Palermo, Shankar Ramaswamy, Ernesto Su:
The Paradigm Compiler for Distributed-Memory Multicomputers. Computer 28(10): 37-47 (1995) - [c6]Kaushik De, John A. Chandy, Sumit Roy, Steven Parkes, Prithviraj Banerjee:
Parallel algorithms for logic synthesis using the MIS approach. IPPS 1995: 579-585 - 1994
- [c5]Daniel J. Palermo, Ernesto Su, John A. Chandy, Prithviraj Banerjee:
Communication Optimizations Used in the PARADIGM Compiler for Distributed Memory Multicomputers. ICPP (2) 1994: 1-10 - [c4]Sungho Kim, Prithviraj Banerjee, Balkrishna Ramkumar, Steven Parkes, John A. Chandy:
ProperPLACE: A Portable Parallel Algorithm for Standard Cell Placement. IPPS 1994: 932-941 - [c3]Steven Parkes, John A. Chandy, Prithviraj Banerjee:
A library-based approach to portable, parallel, object-oriented programming: interface, implementation, and application. SC 1994: 69-78 - 1993
- [j1]A. L. Narasimha Reddy, John A. Chandy, Prithviraj Banerjee:
Design and Evaluation of Gracefully Degradable Disk Arrays. J. Parallel Distributed Comput. 17(1-2): 28-40 (1993) - [c2]John A. Chandy, A. L. Narasimha Reddy:
Failure Evaluation of Disk Array Organizations. ICDCS 1993: 319-326 - [c1]John A. Chandy, Prithviraj Banerjee:
Reliability Evalutaion of Disk Array Architectures. ICPP (1) 1993: 263-267
Coauthor Index
aka: Fatemeh Tehranipoor
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