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ORCIDShervin Vakili
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2020 – today
- 2024
[j8]Shervin Vakili
, Amirhossein Zarei:
DSCAM: Latency-Guaranteed and High-Capacity Content-Addressable Memory on FPGAs. IEEE Embed. Syst. Lett. 16(2): 182-185 (2024)- [c11]Shervin Vakili:
A Cost-Effective Baugh-Wooley Approximate Multiplier for FPGA-based Machine Learning Computing. AICAS 2024: 367-371 - [i4]Mobin Vaziri, Shervin Vakili, M. Mehdi Rahimifar, J. M. Pierre Langlois:
HENNC: Hardware Engine for Artificial Neural Network-based Chaotic Oscillators. CoRR abs/2407.19165 (2024) - 2023
- [c10]Shervin Vakili:
DSCAM+: Latency-Guaranteed FPGA-Based Content Addressable Memory for SDN-Enabled Forwarding Plane. HPCC/DSS/SmartCity/DependSys 2023: 311-318 - [c9]Anees Rehman, Shervin Vakili:
A Cost-Effective FPGA-Based Approximate Multiplier for Machine Learning Acceleration. PAAP 2023: 1-6 - [i3]Shervin Vakili, Mobin Vaziri, Amirhossein Zarei, J. M. Pierre Langlois:
Fast and Low-Cost Approximate Multiplier for FPGAs using Dynamic Reconfiguration. CoRR abs/2310.10053 (2023) - 2021
- [j7]Mehdi Ahmadi, Shervin Vakili, J. M. Pierre Langlois:
CARLA: A Convolution Accelerator With a Reconfigurable and Low-Energy Architecture. IEEE Trans. Circuits Syst. I Regul. Pap. 68(8): 3184-3196 (2021) - 2020
- [c8]Mehdi Ahmadi, Shervin Vakili, J. M. Pierre Langlois:
An Energy-Efficient Accelerator Architecture with Serial Accumulation Dataflow for Deep CNNs. NEWCAS 2020: 214-217 - [c7]Mehdi Ahmadi, Shervin Vakili, J. M. Pierre Langlois:
Heterogeneous Distributed SRAM Configuration for Energy-Efficient Deep CNN Accelerators. NEWCAS 2020: 287-290 - [i2]Mehdi Ahmadi, Shervin Vakili, J. M. Pierre Langlois:
An Energy-Efficient Accelerator Architecture with Serial Accumulation Dataflow for Deep CNNs. CoRR abs/2002.07711 (2020) - [i1]Mehdi Ahmadi, Shervin Vakili, J. M. Pierre Langlois:
CARLA: A Convolution Accelerator with a Reconfigurable and Low-Energy Architecture. CoRR abs/2010.00627 (2020)
2010 – 2019
- 2018
- [j6]Shervin Vakili, J. M. Pierre Langlois, Yvon Savaria, Naraig Manjikian:
Enhanced Bloom filter utilisation scheme for string matching using a splitting approach. IET Commun. 12(7): 868-875 (2018) - [c6]Mehdi Ahmadi, Shervin Vakili, J. M. Pierre Langlois, Warren J. Gross:
Power Reduction in CNN Pooling Layers with a Preliminary Partial Computation Strategy. NEWCAS 2018: 125-129 - 2017
- [c5]Ideh Sarbishei, Shervin Vakili, J. M. Pierre Langlois, Yvon Savaria:
Scalable memory-less architecture for string matching with FPGAs. ISCAS 2017: 1-4 - 2016
- [j5]Shervin Vakili, J. M. Pierre Langlois, Guy Bois:
Accuracy-aware processor customisation for fixed-point arithmetic. IET Comput. Digit. Tech. 10(1): 1-11 (2016) - [c4]Shervin Vakili, J. M. Pierre Langlois, Bochra Boughzala, Yvon Savaria:
Memory-Efficient String Matching for Intrusion Detection Systems using a High-Precision Pattern Grouping Algorithm. ANCS 2016: 37-42 - 2015
- [c3]Shervin Vakili, J. M. Pierre Langlois, Guy Bois:
Designing customized microprocessors for fixed-point computation. AHS 2015: 1 - 2013
- [j4]Shervin Vakili, J. M. Pierre Langlois, Guy Bois:
Customised soft processor design: a compromise between architecture description languages and parameterisable processors. IET Comput. Digit. Tech. 7(3) (2013) - [j3]Shervin Vakili, J. M. Pierre Langlois, Guy Bois:
Enhanced Precision Analysis for Accuracy-Aware Bit-Width Optimization Using Affine Arithmetic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(12): 1853-1865 (2013) - [c2]Shervin Vakili, J. M. Pierre Langlois, Guy Bois:
Finite-precision error modeling using affine arithmetic. ICASSP 2013: 2591-2595 - 2011
- [c1]Shervin Vakili, Diana Carolina Gil, J. M. Pierre Langlois, Yvon Savaria, Guy Bois:
Customized embedded processor design for global photographic tone mapping. ICECS 2011: 382-385 - 2010
- [j2]Amin Farmahini Farahani, Shervin Vakili, Sied Mehdi Fakhraie, Saeed Safari, Caro Lucas:
Parallel scalable hardware implementation of asynchronous discrete particle swarm optimization. Eng. Appl. Artif. Intell. 23(2): 177-187 (2010) - [j1]Shervin Vakili, Sied Mehdi Fakhraie, Siamak Mohammadi:
Evolvable multi-processor: A novel MPSoC architecture with evolvable task decomposition and scheduling. IET Comput. Digit. Tech. 4(2): 143-156 (2010)
Coauthor Index
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