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2020 – today
- 2021
[c12]Xinkang Chen, Chun-Li Lo, Mark C. Johnson, Zhihong Chen
, Sumeet Kumar Gupta:
Modeling and Circuit Analysis of Interconnects with TaS2 Barrier/Liner. DRC 2021: 1-2
2010 – 2019
- 2019
- [c11]Jacob Covey, Mark C. Johnson:
System-on-a-Chip Design as a Platform for Teaching Design and Design Flow Integration. ACM Great Lakes Symposium on VLSI 2019: 249-253 - 2017
- [c10]Todd Wild, Noah Chesnut, Gabriel Martini, Mark C. Johnson:
Indiana bicentennial torch project: Trial by fire. MSE 2017: 19-22 - 2016
- [c9]Matthew Leiter, Lucas Goedde, Emily Fredette, Noah Chesnut, Matthew A. Swabey, Mark C. Johnson:
Student use and assessment of System on Chip (SOC) prototyping resource. EWME 2016: 1-4 - 2015
- [c8]Matthew A. Swabey, Mark C. Johnson:
Satisfying ABET criterion using an industrial Microelectronic Skills Incubator. MSE 2015: 28-31 - 2011
- [c7]Mark C. Johnson:
Interactive application for learning RTL code structures. MSE 2011: 122-125
2000 – 2009
- 2009
- [c6]Mark C. Johnson, Eric P. Villasenor, Olga Krachina, Mithuna Thottethodi:
Undergraduate dual-core prototyping and analysis of factors influencing student success on dual-core designs. MSE 2009: 1-4 - 2004
- [c5]Dongku Kang, Mark C. Johnson, Kaushik Roy:
Simultaneous Multiple-Vdd Scheduling and Allocation for Partitioned Floorplan. ISQED 2004: 98-103 - 2003
- [c4]Dongku Kang, Mark C. Johnson, Kaushik Roy:
Multiple-Vdd Scheduling/Allocation for Partitioned Floorplan. ICCD 2003: 412-418 - 2002
- [j4]Mark C. Johnson, Dinesh Somasekhar, Lih-Yih Chiou, Kaushik Roy:
Leakage control with efficient use of transistor stacks in single threshold CMOS. IEEE Trans. Very Large Scale Integr. Syst. 10(1): 1-5 (2002) - 2001
- [c3]Mark C. Johnson:
igital Design Education Infrastructure Using Multiple EDA Tool Vendors and Multiple Modes of Tool Access. MSE 2001: 81-82
1990 – 1999
- 1999
- [j3]Mark C. Johnson, Dinesh Somasekhar, Kaushik Roy:
Models and algorithms for bounds on leakage in CMOS circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18(6): 714-725 (1999) - [j2]Liqiong Wei, Zhanping Chen, Kaushik Roy, Mark C. Johnson, Yibin Ye, Vivek De:
Design and optimization of dual-threshold circuits for low-voltage low-power applications. IEEE Trans. Very Large Scale Integr. Syst. 7(1): 16-24 (1999) - [c2]Mark C. Johnson, Dinesh Somasekhar, Kaushik Roy:
Leakage Control with Efficient Use of Transistor Stacks in Single Threshold CMOS. DAC 1999: 442-445 - 1997
- [j1]Mark C. Johnson, Kaushik Roy:
Datapath scheduling with multiple supply voltages and level converters. ACM Trans. Design Autom. Electr. Syst. 2(3): 227-248 (1997) - 1996
- [c1]Mark C. Johnson, Kaushik Roy:
Optimal Selection of Supply Voltages and Level Conversions During Data Path Scheduling Under Resource Constraints. ICCD 1996: 72-77
Coauthor Index
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