"Acceleration of the Fast Multipole Method on FPGA Devices."

Hitoshi Ukawa, Tetsu Narumi (2015)

> Home

Details and statistics

DOI: 10.1587/TRANSINF.2014RCL0002

access: closed

type: Journal Article

metadata version: 2020-04-11

- view
  authority control:
- export record
  dblp key:
  - journals/ieicet/UkawaN15
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/journals/ieicet/UkawaN15
Hitoshi Ukawa, Tetsu Narumi:
Acceleration of the Fast Multipole Method on FPGA Devices. IEICE Trans. Inf. Syst. 98-D(2): 309-312 (2015)

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.