"Two-level cache architecture to reduce memory accesses for IP lookups."

Sunil Ravinder, Mario A. Nascimento, Michael H. MacGregor (2011)

> Home

Details and statistics

DOI: —

access: closed

type: Conference or Workshop Paper

metadata version: 2022-11-12

- view
  - electronic edition @ ieee.org
- export record
  dblp key:
  - conf/teletraffic/RavinderNM11
- ask others
- share record
  persistent URL:
  - https://dblp.org/rec/conf/teletraffic/RavinderNM11
Sunil Ravinder, Mario A. Nascimento, Michael H. MacGregor:
Two-level cache architecture to reduce memory accesses for IP lookups. ITC 2011: 278-285

manage site settings

To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.