"Microarchitectural-level statistical timing models for near-threshold ..."

Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera (2015)

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DOI: 10.1109/ASPDAC.2015.7058986

access: closed

type: Conference or Workshop Paper

metadata version: 2017-09-16

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Jun Shiomi, Tohru Ishihara, Hidetoshi Onodera:
Microarchitectural-level statistical timing models for near-threshold circuit design. ASP-DAC 2015: 87-93

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