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ORCIDNikhil Jayakumar
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2010 – 2019
- 2013
[c24]Ayan Mandal, Kalyana C. Bollapalli, Nikhil Jayakumar, Sunil P. Khatri, Rabi N. Mahapatra:
A low-jitter phase-locked resonant clock generation and distribution scheme. ICCD 2013: 487-490- [c23]Cliff C. N. Sze, Laleh Behjat, Nikhil Jayakumar, Atul Walimbe, Gregory Ford, Mark Zwolinski, Harish Dangat, Giriraj Kakol:
ISPD 2013 expert designer/user session (eds). ISPD 2013: 137 - 2011
- [c22]Ayan Mandal, Nikhil Jayakumar, Kalyana C. Bollapalli, Sunil P. Khatri, Rabi N. Mahapatra:
An Automated Approach for Minimum Jitter Buffered H-Tree Construction. VLSI Design 2011: 76-81 - 2010
- [j7]Nikhil Jayakumar, Sunil P. Khatri:
A Simultaneous Input Vector Control and Circuit Modification Technique to Reduce Leakage with Zero Delay Penalty. ACM Trans. Design Autom. Electr. Syst. 16(1): 9:1-9:20 (2010)
2000 – 2009
- 2009
- [j6]Suganth Paul, Nikhil Jayakumar, Sunil P. Khatri:
A Fast Hardware Approach for Approximate, Efficient Logarithm and Antilogarithm Computations. IEEE Trans. Very Large Scale Integr. Syst. 17(2): 269-277 (2009) - [j5]Rajesh Garg, Nikhil Jayakumar, Sunil P. Khatri, Gwan S. Choi:
Circuit-Level Design Approaches for Radiation-Hard Digital Electronics. IEEE Trans. Very Large Scale Integr. Syst. 17(6): 781-792 (2009) - 2008
- [j4]Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri, D. M. H. Walker:
A probabilistic method to determine the minimum leakage vector for combinational designs in the presence of random PVT variations. Integr. 41(3): 399-412 (2008) - [j3]Arjun Kapoor, Nikhil Jayakumar, Sunil P. Khatri:
Dynamically De-Skewable Clock Distribution Methodology. IEEE Trans. Very Large Scale Integr. Syst. 16(9): 1220-1229 (2008) - 2007
- [j2]Nikhil Jayakumar, Sunil P. Khatri:
A Predictably Low-Leakage ASIC Design Style. IEEE Trans. Very Large Scale Integr. Syst. 15(3): 276-285 (2007) - [j1]Vijay Nagarajan, Stefan Laendner, Nikhil Jayakumar, Olgica Milenkovic, Sunil P. Khatri:
High-throughput VLSI Implementations of Iterative Decoders and Related Code Construction Problems. J. VLSI Signal Process. 49(1): 185-206 (2007) - [c21]Nikhil Jayakumar, Sunil P. Khatri:
An algorithm to minimize leakage through simultaneous input vector control and circuit modification. DATE 2007: 618-623 - [c20]Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri:
A Structured ASIC Design Approach Using Pass Transistor Logic. ISCAS 2007: 1787-1790 - 2006
- [c19]Nikhil Jayakumar, Rajesh Garg, Bruce Gamache, Sunil P. Khatri:
A PLA based asynchronous micropipelining approach for subthreshold circuit design. DAC 2006: 419-424 - [c18]Rajesh Garg, Nikhil Jayakumar, Sunil P. Khatri, Gwan Choi:
A design approach for radiation-hard digital electronics. DAC 2006: 773-778 - [c17]Rajesh Garg, Mario Sánchez, Kanupriya Gulati, Nikhil Jayakumar, Anshul Gupta, Sunil P. Khatri:
A design flow to optimize circuit delay by using standard cells and PLAs. ACM Great Lakes Symposium on VLSI 2006: 217-222 - [c16]Euncheol Kim, Nikhil Jayakumar, Pankaj Bhagawat, Anand Selvarathinam, Gwan Choi, Sunil P. Khatri:
A High-Speed Fully-Programmable VLSI Decoder for Regular LDPC Codes. ICASSP (3) 2006: 972-975 - [c15]Nikhil Jayakumar, Sunil P. Khatri, Kanupriya Gulati, Alexander Sprintson
:
Network coding for routability improvement in VLSI. ICCAD 2006: 820-823 - [c14]Rajesh Garg, Nikhil Jayakumar, Sunil P. Khatri:
On the Improvement of Statistical Static Timing Analysis. ICCD 2006: 37-42 - [c13]Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri:
A probabilistic method to determine the minimum leakage vector for combinational designs. ISCAS 2006 - 2005
- [c12]Nikhil Jayakumar, Sandeep Dhar, Sunil P. Khatri:
A self-adjusting scheme to determine the optimum RBB by monitoring leakage currents. DAC 2005: 43-46 - [c11]Nikhil Jayakumar, Sunil P. Khatri:
A variation tolerant subthreshold design approach. DAC 2005: 716-719 - [c10]Ganesh Venkataraman, Nikhil Jayakumar, Jiang Hu, Peng Li, Sunil P. Khatri, Anand Rajaram, Patrick McGuinness, Charles J. Alpert:
Practical techniques to reduce skew and its variations in buffered clock networks. ICCAD 2005: 592-596 - [c9]Seraj Ahmad, Nikhil Jayakumar, Vijay Balasubramanian, Edward Hursey, Sunil P. Khatri, Rabi N. Mahapatra:
X-Routing using Two Manhattan Route Instances. ICCD 2005: 45-52 - [c8]Nikhil Jayakumar, Sunil P. Khatri:
Minimum Energy Near-threshold Network of PLA based Design. ICCD 2005: 399-404 - [c7]Kanupriya Gulati, Nikhil Jayakumar, Sunil P. Khatri:
An algebraic decision diagram (ADD) based technique to find leakage histograms of combinational designs. ISLPED 2005: 111-114 - [c6]Edward Hursey, Nikhil Jayakumar, Sunil P. Khatri:
Non-Manhattan Routing Using a Manhattan Router. VLSI Design 2005: 445-450 - 2004
- [c5]Vijay Nagarajan, Nikhil Jayakumar, Sunil P. Khatri, Olgica Milenkovic:
High-throughput VLSI implementations of iterative decoders and related code construction problems. GLOBECOM 2004: 361-365 - [c4]Nikhil Jayakumar, Sunil P. Khatri:
A metal and via maskset programmable VLSI design methodology using PLAs. ICCAD 2004: 590-594 - [c3]Arjun Kapoor, Nikhil Jayakumar, Sunil P. Khatri:
A novel clock distribution and dynamic de-skewing methodology. ICCAD 2004: 626-631 - 2003
- [c2]Nikhil Jayakumar, Mitra Purandare, Fabio Somenzi:
Dos and don'ts of CTL state coverage estimation. DAC 2003: 292-295 - [c1]Nikhil Jayakumar, Sunil P. Khatri:
An ASIC design methodology with predictably low leakage, using leakage-immune standard cells. ISLPED 2003: 128-133
Coauthor Index
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