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Albert Z. Wang
Person information
- affiliation: University of California, Riverside, CA, USA
- affiliation: Illinois Institute of Technology, Chicago, IL, USA
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2020 – today
- 2024
- [j25]Zijin Pan
, Xunyu Li
, Weiquan Hao
, Runyu Miao
, Albert Z. Wang
:
On-chip ESD Protection Design Methodologies by CAD Simulation. ACM Trans. Design Autom. Electr. Syst. 29(1): 4:1-4:41 (2024) - [c55]Xunyu Li, Weiquan Hao, Zijin Pan, Yunru Miao, Zijian Yue, Albert Z. Wang:
Practical Considerations on ESD Testing. VTS 2024: 1-3 - 2023
- [c54]Xunyu Li, Weiquan Hao, Zijin Pan, Runyu Miao, Albert Z. Wang:
Design for EMI Immunity and ESD Protection for Wearable and Flexible ICs (Invited). ASICON 2023: 1-2 - [c53]Weiquan Hao, Xunyu Li, Zijin Pan, Runyu Miao, Albert Z. Wang:
ESD Protection is About Circuit Design: Practices and Perspectives. A-SSCC 2023: 1-3 - [c52]Zijin Pan, Jeremy Carleton, Sunny Zeng, Tian Lang, Gang Chen, Yehuda E. Kalay, Ramdas Pai, Albert Z. Wang:
Design Implementation of A Hybrid VLP/PLC-Based Indoor Tracking System for Smart Hospitals. ICCE 2023: 1-3 - [c51]Mengfu Di, Weiquan Hao, Xunyu Li, Zijin Pan, Runyu Miao, Albert Z. Wang:
A 38GHz SPDT Traveling Wave Switch with 5A CDM ESD Protection in 45nm PDSOI for 5G System. RWS 2023: 17-19 - [c50]Zijin Pan, Xunyu Li, Weiquan Hao, Runyu Miao, Albert Z. Wang:
Visible Light Communication Based Smart IoT Technologies and Applications. SmartIoT 2023: 332-335 - 2021
- [c49]Tian Lang, Zijin Pan, Nathaniel Ortiz
, Gang Chen, Yehuda E. Kalay, Ramdas Pai, Albert Z. Wang:
Integrated Design of Low Complexity RSS Based Visible Light Indoor Positioning and Power-Line Communication System for Smart Hospitals. ICCE 2021: 1-5 - 2020
- [j24]Chenkun Wang
, Feilong Zhang
, Fei Lu
, Qi Chen
, Cheng Li
, Albert Z. Wang
:
A Study of Transient Voltage Peaking in Diode-Based ESD Protection Structures in 28nm CMOS. IEEE Access 8: 87164-87172 (2020) - [c48]Yehuda E. Kalay
, Haripriya Sathyanarayanan
, Davide Schaumann
, Albert Z. Wang, Gang Chen, Ramdas G. Pai:
VLC-Enabled Human-Aware Building Management System. HCI (23) 2020: 207-222
2010 – 2019
- 2019
- [j23]Zijin Pan, Tian Lang, Cheng Li, Mengfu Di, Gang Chen, Yehuda E. Kalay, Ramdas Pai, Albert Z. Wang:
Visible Light Communication Cyber-Physical Systems-on- Chip for Smart Cities. J. Commun. 14(12): 1141-1146 (2019) - [j22]Feilong Zhang
, Chenkun Wang
, Fei Lu
, Qi Chen
, Cheng Li, X. Shawn Wang
, Daguang Li, Albert Z. Wang
:
A Full-Chip ESD Protection Circuit Simulation and Fast Dynamic Checking Method Using SPICE and ESD Behavior Models. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(3): 489-498 (2019) - [c47]Zijin Pan, Tian Lang, Zening Li, Gang Chen, Albert Z. Wang:
A Study of Optical Tag Detection Using Rolling Shutter Based Visible Light Communications. GLOBECOM 2019: 1-5 - [c46]Cheng Li, Feilong Zhang, Mengfu Di, Zijin Pan, Albert Z. Wang:
Developing 3D Heterogeneous Structures for Future Chips. ICICDT 2019: 1-4 - 2018
- [c45]Chenkun Wang, Fei Lu, Qi Chen, Feilong Zhang, Cheng Li, Dawn Wang, Albert Z. Wang:
A study of impacts of ESD protection on 28/38GHz RF switches in 45nm SOI CMOS for 5G mobile applications. RWS 2018: 157-160 - [c44]Qi Chen, Chenkun Wang, Feilong Zhang, Cheng Li, Albert Z. Wang:
3D heterogeneous integration enabling future RF ICs. RWS 2018: 188-190 - 2017
- [j21]He Tang, Yong Peng, Xiang Lu, Albert Z. Wang, Hai Wang:
A quantitative design methodology for high-speed interpolation/averaging ADCs. Integr. 58: 215-224 (2017) - [c43]Qi Chen, Cheng Li, Fei Lu, Chenkun Wang, Feilong Zhang, Tianru Wu, Xiaoming Xie, Kun Zhang, Xinxin Li, Jimmy Ng, Ya-Hong Xie, Yuhua Cheng, Albert Z. Wang:
Characterization of single-crystalline graphene ESD interconnects. ASICON 2017: 977-980 - [c42]Albert Z. Wang, Fei Lu, Qi Chen, Chenkun Wang, Cheng Li, Feilong Zhang:
Key note: Integrated design-for-reliability for ICs. LASCAS 2017: 1-4 - [c41]Albert Z. Wang, Qi Chen, Cheng Li, Fei Lu, Chenkun Wang, Feilong Zhang, X. Shawn Wang, Jimmy Ng, Ya-Hong Xie, Rui Ma, Li Wang, Lin Lin:
More-Than-Moore: 3D heterogeneous integration into CMOS technologies. NEMS 2017: 1-4 - [c40]Jimmy Ng, Wei Zhang, Ya-Hong Xie, Qi Chen, Rui Ma, Albert Z. Wang:
Optimization of suspended graphene NEMS devices for electrostatic discharge applications. NEMS 2017: 364-369 - [c39]Qi Chen, Cheng Li, Fei Lu, Chenkun Wang, Feilong Zhang, Albert Z. Wang, Jimmy Ng, Ya-Hong Xie:
TLP measurement and analysis of graphene NEMS switches for on-chip ESD protection. NEMS 2017: 370-374 - 2016
- [j20]Fei Lu, Rui Ma, Zongyu Dong, Li Wang, Chen Zhang, Chenkun Wang, Qi Chen, X. Shawn Wang, Feilong Zhang, Cheng Li, He Tang, Yuhua Cheng, Albert Z. Wang:
A Systematic Study of ESD Protection Co-Design With High-Speed and High-Frequency ICs in 28 nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 63-I(10): 1746-1757 (2016) - 2015
- [j19]Zening Li, Linchao Liao, Albert Z. Wang, Gang Chen:
Vehicular optical ranging and communication system. EURASIP J. Wirel. Commun. Netw. 2015: 190 (2015) - [c38]Li Wang, Rui Ma, Fei Lu, Albert Z. Wang, Zongyu Dong, Xin Wang, Chen Zhang, Bin Zhao, Siqiang Fan, He Tang:
Function-based ESD protection circuit design verification for BGA pad-ring array. ASICON 2015: 1-4 - [c37]Wei Zhang, Qi Chen, Ming Xia
, Rui Ma, Fei Lu, Chenkun Wang, Albert Z. Wang, Ya-Hong Xie:
TLP evaluation of ESD protection capability of graphene micro-ribbons for ICs. ASICON 2015: 1-4 - [c36]Tian Lang, Zening Li, Albert Z. Wang, Gang Chen:
Hemispherical Lens Featured Beehive Structure Receiver on Vehicular Massive MIMO Visible Light Communication System. IOV 2015: 469-477 - 2014
- [j18]Albert Z. Wang:
Introduction to the Special Section on the 2013 IEEE Bipolar/BiCMOS Circuits and Technology Meeting. IEEE J. Solid State Circuits 49(9): 1875 (2014) - [j17]X. Shawn Wang, Xin Wang, Fei Lu, Chen Zhang, Zongyu Dong, Li Wang, Rui Ma, Zitao Shi, Albert Z. Wang, Mau-Chung Frank Chang
, Dawn Wang, Alvin J. Joseph, C. Patrick Yue
:
Concurrent Design Analysis of High-Linearity SP10T Switch With 8.5 kV ESD Protection. IEEE J. Solid State Circuits 49(9): 1927-1941 (2014) - [c35]Li Wang, Rui Ma, Chen Zhang, Zongyu Dong, Fei Lu, Albert Z. Wang, Xin Wang, Jian Liu, Siqiang Fan, He Tang, Baoyong Chi, Liji Wu, Tianling Ren:
Scalable behavior modeling for SCR based ESD protection structures for circuit simulation. ISCAS 2014: 2333-2336 - 2013
- [j16]Zitao Shi, Albert Z. Wang, Yuhua Cheng:
An optimized UWB correlator design with the consideration of the impacts from the ESD protection devices. Sci. China Inf. Sci. 56(6): 1-9 (2013) - [j15]Jing Zhang, Chen Yang, Xin Wang, Tianling Ren, Albert Z. Wang, Yi Yang, L.-L. Tian:
Integrated stacked-Spiral RF inductor with nanopowder magnetic Core. J. Circuits Syst. Comput. 22(10) (2013) - [j14]Xin Wang, Zitao Shi, Jian Liu, Lin Lin, Hui Zhao, Li Wang, Rui Ma, Chen Zhang, Zongyu Dong, Siqiang Fan, He Tang, Albert Z. Wang, Yuhua Cheng, Bin Zhao, Zhigang Zhang, Baoyong Chi, Tianling Ren:
Post-Si Programmable ESD Protection Circuit Design: Mechanisms and Analysis. IEEE J. Solid State Circuits 48(5): 1237-1249 (2013) - [c34]Siqiang Fan, Albert Z. Wang, Bin Zhao:
Folding and interpolation ADC design methodology. ASICON 2013: 1-4 - [c33]Zitao Shi, Xin Wang, Albert Z. Wang, Yuhua Cheng:
A 5kV ESD-protected 2.4GHz PA in 180nm RFCMOS optimized by ESD-PA co-design technique. ASICON 2013: 1-4 - [c32]He Tang, Yong Peng, Xiang Lu, Hai Wang, Albert Z. Wang:
Quantitative analysis for high speed interpolated/averaging ADC. ASICON 2013: 1-4 - [c31]Albert Z. Wang:
Concurrent design of ESD protection and ICs for optimization and prediction. CICC 2013: 1-34 - [c30]X. Shawn Wang, Xin Wang, Fei Lu, Li Wang, Rui Ma, Zongyu Dong, Li Sun, Albert Z. Wang, C. Patrick Yue
, Dawn Wang, Alvin J. Joseph:
A smartphone SP10T T/R switch in 180-nm SOI CMOS with 8kV+ ESD protection by co-design. CICC 2013: 1-4 - [c29]Li Wang, Xin Wang, Zitao Shi, Rui Ma, Chen Zhang, Zongyu Dong, Fei Lu, Hui Zhao, Albert Z. Wang:
Scalable behavior modeling for 3D field-programmable ESD protection structures. CICC 2013: 1-4 - [c28]Xiaobao Yu, Baoyong Chi, Meng Wei, Albert Z. Wang, Tianling Ren, Zhihua Wang:
A half rate CDR with DCD cleaning up and quadrature clock calibration for 20Gbps 60GHz communication in 65nm CMOS. ISCAS 2013: 962-965 - [c27]Shijun Wang, Fai Yao, Li Wang, Rui Ma, C. Zhang, Zongyu Dong, Albert Z. Wang, Zitao Shi, Yuhua Cheng, Baoyong Chi, Tianling Ren:
Design and analysis of full-chip HV ESD protection in BCD30V for mixed-signal ICs. ISCAS 2013: 1059-1062 - [c26]Nan Qi, Zheng Song, Baoyong Chi, Albert Z. Wang, Tianling Ren, Zhihua Wang:
A multi-mode complex bandpass filter with gm-assisted power optimization and I/Q calibration. ISCAS 2013: 1845-1848 - [c25]Li Wang, Rui Ma, Chen Zhang, Zongyu Dong, Xin Wang, Zitao Shi, Jian Liu, Lin Lin, Hui Zhao, Fei Lu, Qiang Fang, Chen Yang, Jing Zhan, Tianling Ren, Xinxin Li, Ru Huang, Albert Z. Wang:
Heterogeneous integration of nano enabling devices for 3D ICs. ISLPED 2013: 249-254 - 2012
- [c24]Jian Liu, Zitao Shi, Xin Wang, Hui Zhao, L. Wang, Chen Zhang, Zongyu Dong, L. Lin, Albert Z. Wang, Yuhua Cheng, Bin Zhao:
Field programmable SONOS ESD protection design. CICC 2012: 1-4 - [c23]Li Wang, Rui Ma, Albert Z. Wang, Xin Wang, Bin Zhao, X. Shawn Wang, Patrick Yue, Zitao Shi, Yuhua Cheng:
A design technique overview on broadband RF ESD protection circuit designs. MWSCAS 2012: 590-593 - 2011
- [j13]Xin Wang, Lin Lin, He Tang, Hui Zhao, Qiang Fang, Jian Liu, Siqiang Fan, Albert Z. Wang, Bin Zhao, Liwu Yang, Gary Zhang:
Low power 3.1-10.6 GHz IR-UWB transmitter for Gbps wireless communications. Sci. China Inf. Sci. 54(5): 1094-1102 (2011) - [j12]Xin Wang, He Tang, Lin Lin, Jian Liu, Qiang Fang, Hui Zhao, Albert Z. Wang, Zitao Shi, Siqiang Fan, Bin Zhao, Liwu Yang, Jun He, Yuhua Cheng:
Co-design of ESD protection and UWB RF front-end ICs. Sci. China Inf. Sci. 54(10): 2209-2220 (2011) - [j11]He Tang, Hui Zhao, Siqiang Fan, Xin Wang, Lin Lin, Qiang Fang, Jian Liu, Albert Z. Wang:
Design Matrix Analysis for Capacitive Interpolation Flash ADC. J. Low Power Electron. 7(1): 61-70 (2011) - [j10]Jian Liu, Xin Wang, Hui Zhao, Qiang Fang, Albert Z. Wang, Lin Lin, He Tang, Siqiang Fan, Bin Zhao, Shi-Jie Wen, Richard Wong:
Design and Analysis of Low-Voltage Low-Parasitic ESD Protection for RF ICs in CMOS. IEEE J. Solid State Circuits 46(5): 1100-1110 (2011) - [j9]Xin Wang, Xiaokang Guan, Siqiang Fan, He Tang, Hui Zhao, Lin Lin, Qiang Fang, Jian Liu, Albert Z. Wang, Liwu Yang:
ESD-Protected Power Amplifier Design in CMOS for Highly Reliable RF ICs. IEEE Trans. Ind. Electron. 58(7): 2736-2743 (2011) - 2010
- [j8]Haolu Xie, Xin Wang, Lin Lin, He Tang, Qiang Fang, Hui Zhao, Shijun Wang, Fei Yao, Albert Z. Wang, Yumei Zhou, Bo Qin:
A 52-mW 3.1-10.6-GHz Fully Integrated Correlator for IR-UWB Transceivers in 0.18 μm CMOS. IEEE Trans. Ind. Electron. 57(5): 1546-1554 (2010) - [j7]Bo Qin, Xin Wang, Haolu Xie, Lin Lin, He Tang, Albert Z. Wang, Hongyi Chen, Bin Zhao, Liwu Yang, Yumei Zhou:
1.8 pJ/Pulse Programmable Gaussian Pulse Generator for Full-Band Noncarrier Impulse-UWB Transceivers in 90-nm CMOS. IEEE Trans. Ind. Electron. 57(5): 1555-1562 (2010)
2000 – 2009
- 2009
- [c22]Bo Qin, Hongyi Chen, Xin Wang, Albert Z. Wang, Yinghui Hao, Lee Yang, Bin Zhao:
A Single-chip 33pJ/pulse 5th-derivative Gaussian based IR-UWB Transmitter in 0.13µm CMOS. ISCAS 2009: 401-404 - 2008
- [c21]Wing-Shan Tam, Oi-Ying Wong, Chi-Wah Kok, Hei Wong
, Albert Z. H. Wang:
A Wideband three-stage rail-to-rail power amplifier driving large capacitive load. APCCAS 2008: 1394-1397 - 2007
- [c20]Haolu Xie, Xin Wang, Albert Z. Wang, Bo Qin, Hongyi Chen, Yumei Zhou, Bin Zhao:
A Varying Pulse Width Second Order Derivative Gaussian Pulse Generator for UWB Transceivers in CMOS. ISCAS 2007: 2794-2797 - 2006
- [c19]Xiaokang Guan, Albert Z. Wang, Akira Ishikawa, Satoru Tamura, Kaoru Takasuka, Zhihua Wang, Chun Zhang:
A 3V 110µW 3.1 ppm/°C curvature-compensated CMOS bandgap reference. ISCAS 2006 - [c18]Haolu Xie, Siqiang Fan, Xin Wang, Albert Z. Wang, Zhihua Wang, Hongyi Chen:
A Pulse-Based Full-Band UWB Transceiver SoC in 0.18μm SiGe BiCMOS. SoCC 2006: 73-76 - 2005
- [j6]Albert Z. H. Wang, Sreedhar Natarajan, Jafar Savoj:
Introduction to the Special Issue on the IEEE 2004 Custom Integrated Circuits Conference. IEEE J. Solid State Circuits 40(9): 1775-1777 (2005) - [c17]Rouying Zhan, Haolu Xie, Haigang Feng, Albert Z. Wang:
ESDZapper: a new layout-level verification tool for finding critical discharging path under ESD stress. ASP-DAC 2005: 79-82 - [c16]Jim Lipman, Albert Z. Wang:
Body wellness without wires. CICC 2005: 2-3 - [c15]Jafar Savoj, David Rich, Brett Forejt, Peter R. Kinget
, Un-Ku Moon, Modest M. Oprysko, Behzad Razavi, Hisashi (Sam) Shichijo, Albert Z. Wang:
Will continued process-node shrinks kill high-performance analog design? CICC 2005: 616-617 - [c14]Haigang Feng, Qiong Wu, Xiaokang Guan, Rouying Zhan, Albert Z. Wang, Liwu Yang:
A 5 GHz sub-harmonic direct down-conversion mixer for dual-band system in 0.35µm SiGe BiCMOS. ISCAS (5) 2005: 4807-4810 - [c13]Qiong Wu, Albert Z. Wang:
A 12 bits/200 MHz resolution/sampling/power-optimized ADC in 0.25µm SiGe BiCMOS. ISCAS (6) 2005: 6174-6177 - 2004
- [j5]Edoardo Charbon, Albert Z. H. Wang, Sreedhar Natarajan:
Introduction to the Special Issue on the IEEE 2003 Custom Integrated Circuits Conference. IEEE J. Solid State Circuits 39(9): 1391-1393 (2004) - [j4]Rouying Zhan, Haigang Feng, Qiong Wu, Haolu Xie, Xiaokang Guan, Guang Chen, Albert Z. Wang:
ESDInspector: a new layout-level ESD protection circuitry design verification tool using a smart-parametric checking mechanism. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23(10): 1421-1428 (2004) - [c12]Rouying Zhan, Haigang Feng, Qiong Wu, Xiaokang Guan, Guang Chen, Haolu Xie, Albert Z. Wang:
Concept and extraction method of ESD-critical parameters for function-based layout-level ESD protection circuit design verification. ASP-DAC 2004: 710-712 - [c11]Haolu Xie, Rouying Zhan, Haigang Feng, Guang Chen, Albert Z. Wang, R. Gafiteanu:
A 3D mixed-mode ESD protection circuit simulation-design methodology. CICC 2004: 243-246 - [c10]Rouying Zhan, Haigang Feng, Haolu Xie, Albert Z. Wang:
ESDInspector: a new layout-level ESD protection circuitry design verification tool using a smart-parametric checking mechanism. ISCAS (5) 2004: 217-220 - [c9]Haibo Long, Zhenghe Feng, Haigang Feng, Albert Z. Wang, Tianling Ren:
L-simulator: a magPEEC-based new CAD tool for simulating magnetic-enhanced IC inductors of 3D arbitrary geometry. ISCAS (5) 2004: 233-237 - 2003
- [j3]Haigang Feng, Guang Chen, Rouying Zhan, Qiong Wu, Xiaokang Guan, Haolu Xie, Albert Z. H. Wang, R. Gafiteanu:
A mixed-mode ESD protection circuit simulation-design methodology. IEEE J. Solid State Circuits 38(6): 995-1006 (2003) - [j2]Rouying Zhan, Haigang Feng, Qiong Wu, Haolu Xie, Xiaokang Guan, Guang Chen, Albert Z. Wang:
ESDExtractor: A new technology-independent CAD tool for arbitrary ESD protection device extraction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22(10): 1362-1370 (2003) - [c8]Albert Z. Wang:
Recent developments in ESD protection for RF ICs. ASP-DAC 2003: 171-178 - [c7]Haigang Feng, Rouying Zhan, Qiong Wu, Guang Chen, Xiaokang Guan, Haolu Xie, Albert Z. Wang:
Mixed-mode ESD protection circuit simulation-design methodology. ISCAS (4) 2003: 652-655 - [c6]Haigang Feng, Rouying Zhan, Guang Chen, Qiong Wu, Xiaokang Guan, Haolu Xie, Albert Z. Wang:
Bonding-pad-oriented on-chip ESD protection structures for ICs. ISCAS (1) 2003: 741-744 - 2002
- [c5]Albert Z. Wang, Haigang Feng, Rouying Zhan, Guang Chen, Q. Wu:
ESD protection design for RF integrated circuits: new challenges. CICC 2002: 411-418 - [c4]Rouying Zhan, Haigang Feng, Qiong Wu, Guang Chen, Xiaokang Guan, Albert Z. Wang:
A technology-independent CAD tool for ESD protection device extraction: ESDExtractor. ICCAD 2002: 510-513 - 2001
- [j1]Albert Z. H. Wang, Chen-Hui Tsay:
An on-chip ESD protection circuit with low trigger voltage in BiCMOS technology. IEEE J. Solid State Circuits 36(1): 40-45 (2001) - [c3]Haigang Feng, Ke Gong, Albert Z. Wang:
An ESD protection circuit for mixed-signal ICs. CICC 2001: 493-496 - 2000
- [c2]Albert Z. Wang:
A new design for complete on-chip ESD protection. CICC 2000: 87-90
1990 – 1999
- 1999
- [c1]Albert Z. Wang, Chen-Hui Tsay:
A low-triggering circuitry for dual-direction ESD protection. CICC 1999: 139-142
Coauthor Index
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