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María Dolores Valdés
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2020 – today
- 2022
- [j6]Sergio Vazquez
, Daniel L. Marino
, Eduardo Zafra
, María Dolores Valdés Peña
, Juan J. Rodríguez-Andina
, Leopoldo García Franquelo
, Milos Manic
:
An Artificial Intelligence Approach for Real-Time Tuning of Weighting Factors in FCS-MPC for Power Converters. IEEE Trans. Ind. Electron. 69(12): 11987-11998 (2022) - 2021
- [j5]Camilo Quintáns Graña
, María Dolores Valdés Peña
, Ana María Cao y Paz
, María José Moure Rodríguez
, Jorge Marcos Acevedo
:
Calibration and Uncertainty Evaluation of a Measurement System Using MLE: Application to a U-Bent RI POF-Sensor. IEEE Trans. Instrum. Meas. 70: 1-10 (2021)
2010 – 2019
- 2017
- [c19]Ricardo Pardo, Carlos González-Val, José Fariña
, María Dolores Valdés
, Juan J. Rodríguez-Andina
, Manuel Portela:
Measurement of air flow in newborn poultry transportation systems. IECON 2017: 3568-3573 - [c18]Carlos González-Val, Ricardo Pardo, José Fariña
, María Dolores Valdés
, Juan J. Rodríguez-Andina
, Manuel Portela:
Real-time monitoring of poultry activity in breeding farms. IECON 2017: 3574-3579 - 2015
- [j4]Juan J. Rodríguez-Andina
, María Dolores Valdés Peña
, María José Moure
:
Advanced Features and Industrial Applications of FPGAs - A Review. IEEE Trans. Ind. Informatics 11(4): 853-864 (2015) - 2013
- [c17]Carlos Leong, Jorge Semião
, Isabel C. Teixeira, Marcelino B. Santos
, João Paulo Teixeira, María Dolores Valdés
, Judit Freijedo, Juan J. Rodríguez-Andina
, Fabian Vargas:
Aging monitoring with local sensors in FPGA-based designs. FPL 2013: 1-4 - [c16]María Dolores Valdés
, María José Moure
, Luis Manuel Menéndez:
Full autonomous sensor and actuator network for maturity estimation in early age concrete structures. IECON 2013: 3922-3927 - 2011
- [j3]Judit Freijedo, María Dolores Valdés
, Lucía Costas, María José Moure
, Juan J. Rodríguez-Andina
, Jorge Semião
, Fabian Vargas, Isabel C. Teixeira
, João Paulo Teixeira
:
Lower VDD Operation of FPGA-Based Digital Circuits Through Delay Modeling and Time Borrowing. J. Low Power Electron. 7(2): 185-198 (2011) - [c15]Vasco Bexiga, Carlos Leong, Jorge Semião
, Isabel C. Teixeira
, João Paulo Teixeira
, María Dolores Valdés
, Judit Freijedo, Juan J. Rodríguez-Andina
, Fabian Vargas:
Performance Failure Prediction Using Built-In Delay Sensors in FPGAs. FPL 2011: 301-304 - [c14]María Dolores Valdés
, Judit Freijedo, María José Moure
, Juan J. Rodríguez-Andina
, Jorge Semião
, Fabian Vargas, Isabel C. Teixeira
, João Paulo Teixeira
:
Programmable sensor for on-line checking of signal integrity in FPGA-based systems subject to aging effects. LATW 2011: 1-7
2000 – 2009
- 2007
- [j2]Juan J. Rodríguez-Andina
, María José Moure
, María Dolores Valdés
:
Features, Design Tools, and Application Domains of FPGAs. IEEE Trans. Ind. Electron. 54(4): 1810-1823 (2007) - 2006
- [j1]Camilo Quintáns
, María José Moure
, María Dolores Valdés
, Enrique Mandado:
A virtual instrumentation laboratory based on a reconfigurable coprocessor. IEEE Trans. Instrum. Meas. 55(2): 635-645 (2006) - [c13]María José Moure
, María Dolores Valdés
, Pablo Rodiz, Loreto Rodríguez-Pardo
, José Fariña Rodríguez
:
An FPGA-Based System on Chip for the Measurement of QCM Sensors Resolution. FPL 2006: 1-4 - 2004
- [c12]María Dolores Valdés, Miguel A. Domínguez, María José Moure
, Camilo Quintáns:
A Reconfigurable Communication Processor Compatible with Different Industrial Fieldbuses. FPL 2004: 1011-1016 - [c11]Miguel A. Domínguez, María Dolores Valdés, María José Moure:
Implementation of a Device Compatible with Different Fieldbuses Using Reconfigurable Circuits. ICINCO (3) 2004: 46-53 - [c10]María Dolores Valdés, María José Moure, Camilo Quintáns, Bruno Perez, Enrique Mandado:
A FPGA Learning System combining Hardware and Software Tools. VIRTUAL-LAB 2004: 79-88 - 2003
- [c9]María Dolores Valdés, María José Moure
, Camilo Quintáns, Enrique Mandado:
A Data Acquisition Reconfigurable Coprocessor for Virtual Instrumentation Applications. FPL 2003: 1107-1110 - 2000
- [c8]G. Lías, María Dolores Valdés, Miguel A. Domínguez, María José Moure
:
Implementing a Fieldbus Interface Using an FPGA. FPL 2000: 175-180 - [p1]Angel Salaverría, María José Moure, María Dolores Valdés, Enrique Mandado, Manuel Pérez Cota:
M.A.C. A Hypermedia System for Learning Electronics. Computers and Education in the 21st Century 2000: 287-296
1990 – 1999
- 1999
- [c7]María Dolores Valdés, María José Moure
, Enrique Mandado, Angel Salaverría:
An Alternative Solution for Reconfigurable Coprocessors Hardware and Interface Synthesis. FPL 1999: 462-468 - [c6]María José Moure
, María Dolores Valdés
, Enrique Mandado, Angel Salaverría:
Educational Application of Virtual Instruments Based on Reconfigurable Logic. MSE 1999: 24-25 - 1998
- [c5]María José Moure
, María Dolores Valdés, Enrique Mandado:
Virtual Instruments Based on Reconfigurable Logic. FPL 1998: 505-509 - [c4]María Dolores Valdés, María José Moure
, L. Rodríguez, Enrique Mandado:
Reducing the designing time of configurable interfaces oriented to control applications. ICECS 1998: 253-257 - [c3]Loreto Rodríguez-Pardo, María José Moure, María Dolores Valdés, Enrique Mandado:
A computer assisted learning tool for electronic design training. ICECS 1998: 309-312 - 1997
- [c2]María Dolores Valdés, María José Moure, Loreto Rodríguez-Pardo, J. Álvarez, E. Mandalo:
Using hypermedia for programmable logic devices education. MSE 1997: 111-113 - 1996
- [c1]María Dolores Valdés, María José Moure
, L. Rodríguez, A. del Río:
Interactive Practical Teaching of Digital Circuits Design by Means of Field Programmable Gate Arrays. CALISCE 1996: 408-414
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last updated on 2024-04-25 05:56 CEST by the dblp team
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