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ORCIDForrest Brewer
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- affiliation: University of California, Santa Barbara, USA
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2020 – today
- 2021
[j13]Prashansa Mukim
, Forrest Brewer:
Multiwire Phase Encoding: A Signaling Strategy for High-Bandwidth, Low-Power Data Movement. IEEE Trans. Very Large Scale Integr. Syst. 29(8): 1543-1552 (2021)- 2020
- [j12]Prashansa Mukim, Aditya Dalakoti, David McCarthy, Carrie Segal, Merritt Miller, James F. Buckwalter, Forrest Brewer:
Design and Analysis of Collective Pulse Oscillators. IEEE Trans. Very Large Scale Integr. Syst. 28(5): 1242-1255 (2020)
2010 – 2019
- 2019
- [c61]Joseph Poverelli, Forrest Brewer:
Direct ΣΔ Bitstream Processing for High Performance Feedback Control. CCTA 2019: 444-449 - [c60]Prashansa Mukim, Aditya Dalakoti, David McCarthy, Brandon Pon, Carrie Segal, Merritt Miller, James F. Buckwalter, Forrest Brewer:
Distributed Pulse Rotary Traveling Wave VCO: Architecture and Design. ISVLSI 2019: 235-240 - 2018
- [c59]Merritt Miller, Carrie Segal, David McCarthy, Aditya Dalakoti, Prashansa Mukim, Forrest Brewer:
Impolite High Speed Interfaces with Asynchronous Pulse Logic. ACM Great Lakes Symposium on VLSI 2018: 99-104 - 2017
- [c58]Aditya Dalakoti, Merritt Miller, Forrest Brewer:
Pulse Ring Oscillator Tuning via Pulse Dynamics. ICCD 2017: 469-472 - [c57]Merritt Miller, Aditya Dalakoti, Prashansa Mukim, Forrest Brewer:
Low phase noise pulse rotary wave voltage controlled oscillator. ISOCC 2017: 29-30 - [c56]Aditya Dalakoti, Merritt Miller, Forrest Brewer:
High performance pulse ring voltage controlled oscillator for Internet of Things. ISOCC 2017: 322-323 - [c55]Aditya Dalakoti, Merritt Miller, Forrest Brewer:
Design and analysis of high performance pulse ring VCO. NORCAS 2017: 1-5 - [c54]Mohd. Tasleem Khan, Shaik Rafi Ahamed, Forrest Brewer:
Low Complexity and Critical Path Based VLSI Architecture for LMS Adaptive Filter Using Distributed Arithmetic. VLSID 2017: 127-132 - 2016
- [c53]Aditya Dalakoti, Carrie Segal, Merritt Miller, Forrest Brewer:
Asynchronous High Speed Serial Links Analysis using Integrated Charge for Event Detection. ACM Great Lakes Symposium on VLSI 2016: 121-124 - [c52]Carrie Segal, Aditya Dalakoti, Merritt Miller, Forrest Brewer:
Connectivity Effects on Energy and Area for Neuromorphic System with High Speed Asynchronous Pulse Mode Links. SLIP 2016: 3:1-3:7 - [c51]Vishnuram Abhinav, Dheeraj Kumar Sinha, Amitabh Chatterjee, Forrest Brewer:
A Novel Co-design Methodology for Optimizing ESD Protection Device Using Layout Level Approach. VLSID 2016: 282-287 - 2013
- [c50]Wei Tang, Forrest Brewer:
A hierarchical Ant-Colony heuristic for architecture synthesis for on-chip communication. DASIP 2013: 166-173 - [c49]Merritt Miller, Forrest Brewer:
Formal verification of analog circuit parameters across variation utilizing SAT. DATE 2013: 1442-1447 - [c48]Kunal Arya, Joseph Poverelli, Forrest Brewer:
Ongoing challenges in automated cyberphysical cross-domain design. ICNC 2013: 341-347 - 2011
- [c47]Jian Zhen, Forrest Brewer, Volkan Rodoplu:
Automated MAC Protocol Generation with Multiple Neighborhoods and Acknowledgments Based on Symbolic Monte Carlo Simulation. GLOBECOM 2011: 1-6 - 2010
- [c46]Jian Zhen, Forrest Brewer, Volkan Rodoplu:
A Methodology for Optimal MAC Protocol Generation: Case Study of a Synchronous MAC Channel. GLOBECOM 2010: 1-6 - [c45]Michael Pellauer, Abhinav Agarwal, Asif Khan, Man Cheuk Ng, Muralidaran Vijayaraghavan, Forrest Brewer, Joel S. Emer:
Design contest overview: Combined architecture for network stream categorization and intrusion detection (CANSCID). MEMOCODE 2010: 69-72
2000 – 2009
- 2009
- [j11]Nitin Kataria, Forrest Brewer, João Pedro Hespanha, Timothy Sherwood:
Metric Based Multi-Timescale Control for Reducing Power in Embedded Systems. J. Low Power Electron. 5(3): 354-362 (2009) - [c44]Zi Yie, Nitin Kataria, Chris Burgner, Karl Åström, Forrest Brewer, Kimberly L. Turner:
Control design for force balance sensors. ACC 2009: 4208-4214 - [c43]Forrest Brewer, James C. Hoe:
2009 MEMOCODE Co-Design Contest. MEMOCODE 2009: 66-68 - [c42]Nitin Kataria, Forrest Brewer, João Pedro Hespanha, Timothy Sherwood:
Metric Based Multi-Timescale Control for Reducing Power in Embedded Systems. VLSI Design 2009: 407-412 - 2008
- [j10]Rajesh Gupta, Arvind, Gérard Berry, Forrest Brewer:
Advances in ESL Design. IEEE Des. Test Comput. 25(6): 520-526 (2008) - [j9]Greg Hoover, Forrest Brewer, Timothy Sherwood:
Structural integrity: safety in miniature technology. SIGBED Rev. 5(1): 14 (2008) - [c41]Duarte Antunes, João Pedro Hespanha, Carlos Jorge Ferreira Silvestre, Nitin Kataria, Forrest Brewer:
Computationally efficient methods for digital control. CDC 2008: 502-507 - [c40]Greg Hoover, Forrest Brewer:
Synthesizing Synchronous Elastic Flow Networks. DATE 2008: 306-311 - [c39]Merritt Miller, Greg Hoover, Forrest Brewer:
Pulse-mode link for robust, high speed communications. ISCAS 2008: 3073-3077 - [c38]Greg Hoover, Forrest Brewer, Chris Gill:
Latency-Insensitive Hardware/Software Interfaces. MEMOCODE 2008: 71-72 - 2007
- [c37]Greg Hoover, Forrest Brewer, Timothy Sherwood:
Towards understanding architectural tradeoffs in MEMS closed-loop feedback control. CASES 2007: 95-102 - [c36]Forrest Brewer, James C. Hoe:
MEMOCODE 2007 Co-Design Contest. MEMOCODE 2007: 91-94 - 2006
- [c35]Greg Hoover, Forrest Brewer, Timothy Sherwood:
Extensible control architectures. CASES 2006: 323-333 - [c34]Greg Hoover, Forrest Brewer, Timothy Sherwood:
A case study of multi-threading in the embedded space. CASES 2006: 357-367 - [c33]Ryan Kastner, Wenrui Gong, Xin Hao, Forrest Brewer, Adam Kaplan, Philip Brisk, Majid Sarrafzadeh:
Layout driven data communication optimization for high level synthesis. DATE 2006: 1185-1190 - 2005
- [c32]Ganapathy Parthasarathy, Madhu K. Iyer, Kwang-Ting Cheng, Forrest Brewer:
Structural search for RTL with predicate learning. DAC 2005: 451-456 - [c31]Xin Hao, Forrest Brewer:
Wirelength optimization by optimal block orientation. ICCAD 2005: 64-70 - [c30]Ganapathy Parthasarathy, Madhu K. Iyer, Kwang-Ting Cheng, Forrest Brewer:
RTL SAT simplification by Boolean and interval arithmetic reasoning. ICCAD 2005: 297-302 - [c29]Aravind Vijayakumar, Forrest Brewer:
Weighted control scheduling. ICCAD 2005: 777-783 - [c28]Greg Hoover, Forrest Brewer:
PyPBS design and methodologies. MEMOCODE 2005: 55-64 - 2003
- [j8]Lauren Hui Chen, Malgorzata Marek-Sadowska, Forrest Brewer:
Buffer delay change in the presence of power and ground noise. IEEE Trans. Very Large Scale Integr. Syst. 11(3): 461-473 (2003) - [c27]Sandeep K. Shukla, Ramesh Karri, Seth Copen Goldstein, Forrest Brewer, Kaustav Banerjee, Sankar Basu:
Nano, quantum, and molecular computing: are we ready for the validation and test challenges? HLDVT 2003: 3-7 - 2002
- [j7]Forrest Brewer, Steve Haynal:
Symbolic NFA scheduling of a RISC microprocessor. IEEE Trans. Very Large Scale Integr. Syst. 10(4): 429-434 (2002) - [c26]Lauren Hui Chen, Malgorzata Marek-Sadowska, Forrest Brewer:
Coping with buffer delay change due to power and ground noise. DAC 2002: 860-865 - 2001
- [j6]Steve Haynal, Forrest Brewer:
Automata-Based Symbolic Scheduling for Looping DFGs. IEEE Trans. Computers 50(3): 250-267 (2001) - 2000
- [j5]Shi-Yu Huang, Kwang-Ting Cheng, Kuang-Chien Chen, Chung-Yang Huang, Forrest Brewer:
AQUILA: An Equivalence Checking System for Large Sequential Designs. IEEE Trans. Computers 49(5): 443-464 (2000) - [c25]Steve Haynal, Forrest Brewer:
Representing and Scheduling Looping Behavior Symbolically. ICCD 2000: 552-555
1990 – 1999
- 1999
- [c24]Steve Haynal, Forrest Brewer:
A Model for Scheduling Protocol-Constrained Components and Environments. DAC 1999: 292-295 - [c23]Andrew Crews, Forrest Brewer:
Shape-based sequential machine analysis. ISCAS (1) 1999: 395-399 - [c22]Hien Ha, Forrest Brewer:
Power and signal integrity improvement in ultra high-speed current mode logic. ISCAS (1) 1999: 525-528 - 1998
- [c21]Steve Haynal, Forrest Brewer:
Efficient encoding for exact symbolic automata-based scheduling. ICCAD 1998: 477-481 - 1997
- [c20]Chuck Monahan, Forrest Brewer:
Scheduling and binding bounds for RT-level symbolic execution. ICCAD 1997: 230-235 - 1996
- [j4]Ivan P. Radivojevic, Forrest Brewer:
A new symbolic technique for control-dependent scheduling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15(1): 45-57 (1996) - [c19]Chuck Monahan, Forrest Brewer:
Concurrent Analysis Techniques for Data Path Timing Optimization. DAC 1996: 47-50 - [c18]Tony Stornetta, Forrest Brewer:
Implementation of an Efficient Parallel BDD Package. DAC 1996: 641-644 - [c17]Andrew Crews, Forrest Brewer:
Controller optimization for protocol intensive applications. EURO-DAC 1996: 140-145 - [c16]Ashok Vittal, Hein Ha, Forrest Brewer, Malgorzata Marek-Sadowska:
Clock skew optimization for ground bounce control. ICCAD 1996: 395-399 - 1995
- [j3]Ivan P. Radivojevic, Forrest Brewer:
Symbolic Scheduling Techniques. IEICE Trans. Inf. Syst. 78-D(3): 224-230 (1995) - [c15]Chuck Monahan, Forrest Brewer:
Symbolic Modeling and Evaluation of Data Paths. DAC 1995: 389-394 - [c14]Ivan P. Radivojevic, Forrest Brewer:
On applicability of symbolic techniques to larger scheduling problems. ED&TC 1995: 48-53 - [c13]Chuck Monahan, Forrest Brewer:
Symbolic execution of data paths. Great Lakes Symposium on VLSI 1995: 80-85 - [c12]Ivan P. Radivojevic, Forrest Brewer:
Analysis of conditional resource sharing using a guard-based control representation. ICCD 1995: 434-445 - 1994
- [j2]Andrew Seawright, Forrest Brewer:
Clairvoyant: a synthesis system for production-based specification. IEEE Trans. Very Large Scale Integr. Syst. 2(2): 172-185 (1994) - [c11]Ivan P. Radivojevic, Forrest Brewer:
Incorporating Speculative Execution in Exact Control-Dependent Scheduling. DAC 1994: 479-484 - [c10]Ivan P. Radivojevic, Forrest Brewer:
Ensemble representation and techniques for exact control-dependent scheduling. HLSS 1994: 60-65 - 1993
- [c9]Andrew Seawright, Forrest Brewer:
High-Level Symbolic Construction Technique for High Performance Sequential Synthesis. DAC 1993: 424-428 - 1992
- [c8]Andrew Seawright, Forrest Brewer:
Synthesis from Production-Based Specifications. DAC 1992: 194-199 - [c7]Andrew Seawright, Forrest Brewer:
High performance data-path synthesis via communication metrics. Great Lakes Symposium on VLSI 1992: 60-67 - [c6]Jack Greenbaum, Forrest Brewer:
Interface constrained processor specification and scheduling. Great Lakes Symposium on VLSI 1992: 168-175 - 1991
- [c5]Barry M. Pangrle, Forrest Brewer, Donald A. Lobo, Andrew Seawright:
Relevant Issues in High-Level Connectivity Synthesis. DAC 1991: 607-610 - [c4]Mario Nemirovsky, Forrest Brewer, Roger C. Wood:
DISC: Dynamic Instruction Stream Computer. MICRO 1991: 163-171 - 1990
- [j1]Forrest Brewer, Daniel D. Gajski:
Chippe: a system for constraint driven behavioral synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(7): 681-695 (1990) - [c3]Forrest Brewer, Barry M. Pangrle, Andrew Seawright:
Interconnection synthesis with geometric constraints. MICRO 1990: 158-165
1980 – 1989
- 1988
- [b1]Forrest Brewer:
Constraint Driven Behavioral Synthesis. University of Illinois Urbana-Champaign, USA, 1988 - 1987
- [c2]Forrest Brewer, Daniel Gajski:
Knowledge Based Control in Micro-Architecture Design. DAC 1987: 203-209 - 1986
- [c1]Forrest Brewer, Daniel Gajski:
An expert-system paradigm for design. DAC 1986: 62-68
Coauthor Index
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