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2020 – today
- 2024
[c42]Jahnvi Singh, Nijwm Wary, Pradip Mandal:
Use of current-mode and voltage-mode receivers together for on-chip multipoint-to-multipoint data transmission across global interconnects. VLSID 2024: 73-78- [c41]Tamal Chowdhury, Pradip Mandal:
A Neuro Inspired Pulse Density Modulator Sensing Unipolar and Bipolar Current Signals. VLSID 2024: 113-118 - 2023
- [c40]Subrahmanyam Perumalla, Pradip Mandal:
Ultra-low Power Current Comparator. ISCAS 2023: 1-4 - 2020
- [j25]Nijwm Wary
, Antroy Roy Chowdhury, Pradip Mandal:
Hybrid bidirectional transceiver for multipoint-to-multipoint signalling across on-chip global interconnects. IET Circuits Devices Syst. 14(6): 780-787 (2020) - [j24]Joydeep Basu, Pradip Mandal:
Switched-Capacitor Common-Mode Feedback-Based Fully Differential Operational Amplifiers and its Usage in Implementation of Integrators. J. Circuits Syst. Comput. 29(14): 2050223:1-2050223:17 (2020) - [j23]Joydeep Basu, Pradip Mandal:
Delta-sigma modulator based compact sensor signal acquisition front-end system. Microelectron. J. 98: 104732 (2020)
2010 – 2019
- 2019
- [j22]Sabir Ali Mondal, Pradip Mandal, Hafizur Rahaman:
Fast locking, startup-circuit free, low area, 32-phase analog DLL. Integr. 66: 60-66 (2019) - [c39]Antroy Roy Chowdhury, Nijwm Wary, Pradip Mandal:
A Regulated-Cascode Based Current-Integrating TIA RX with 1-tap Speculative Adaptive DFE. MWSCAS 2019: 790-793 - [c38]Antroy Roy Chowdhury, Nijwm Wary, Pradip Mandal:
Energy Efficient Bidirectional Equalized Transceiver with PVT Insensitive Active Termination. VLSID 2019: 25-30 - 2018
- [j21]Shyamal Kumar Hui, Siraj Uddin, Pradip Mandal:
Submanifolds of generalized \((k, \mu )\) -space-forms. Period. Math. Hung. 77(2): 329-339 (2018) - [c37]Joydeep Basu, Pradip Mandal:
Effect of Switched-Capacitor CMFB on the Gain of Fully Differential Op-Amp for Design of Integrators. ISCAS 2018: 1-5 - 2017
- [j20]Nijwm Wary, Pradip Mandal:
Current-Mode Full-Duplex Transceiver for Lossy On-Chip Global Interconnects. IEEE J. Solid State Circuits 52(8): 2026-2037 (2017) - [j19]Nijwm Wary, Pradip Mandal:
Current-Mode Triline Transceiver for Coded Differential Signaling Across On-Chip Global Interconnects. IEEE Trans. Very Large Scale Integr. Syst. 25(9): 2575-2587 (2017) - 2016
- [c36]Samiran Dam, Pradip Mandal:
A Stacked VCO Architecture for Generating Multi-level Synchronous Control Signals. VLSID 2016: 151-155 - 2015
- [j18]Debashis Mandal, Pradip Mandal, T. K. Bhattacharyya:
Prediction of reference spur in frequency synthesisers. IET Circuits Devices Syst. 9(2): 131-139 (2015) - [j17]Nijwm Wary, Pradip Mandal:
High-speed energy-efficient bi-directional transceiver for on-chip global interconnects. IET Circuits Devices Syst. 9(5): 319-327 (2015) - [j16]Debashis Mandal, Pradip Mandal, Tarun Kanti Bhattacharyya:
Spur reduction in frequency synthesizer with an array of switched capacitors. Int. J. Circuit Theory Appl. 43(12): 1815-1831 (2015) - 2014
- [j15]Kaushik Bhattacharyya, Pradip Mandal:
An approach to design and implementation of on-chip clock generator for the switched capacitor based embedded DC-DC converter. Comput. Electr. Eng. 40(4): 1042-1052 (2014) - [j14]Debashis Mandal, Pradip Mandal, T. K. Bhattacharyya:
Spur reducing architecture of frequency synthesiser using switched capacitors. IET Circuits Devices Syst. 8(4): 237-245 (2014) - [j13]Sudip Kundu, Pradip Mandal:
ISGP: Iterative sequential geometric programming for precise and robust CMOS analog circuit sizing. Integr. 47(4): 510-531 (2014) - 2013
- [j12]Samiran Dam, Pradip Mandal:
Modeling and design of CMOS analog circuits through hierarchical abstraction. Integr. 46(4): 449-462 (2013) - 2012
- [j11]Vijaya Sankara Rao Pasupureddi, Nachiket V. Desai, Pradip Mandal:
A Low-Power 5-Gb/s Current-Mode LVDS Output Driver and Receiver with Active Termination. Circuits Syst. Signal Process. 31(1): 31-49 (2012) - [j10]Vijaya Sankara Rao Pasupureddi, Pradip Mandal:
Active-terminated transmitter and receiver circuits for high-speed low-swing duobinary signaling. Int. J. Circuit Theory Appl. 40(4): 355-376 (2012) - [j9]Kaushik Bhattacharyya, P. V. Ratna Kumar, Pradip Mandal:
Improvement of Power Efficiency and output voltage Ripple of Embedded DC-DC converters with Three Step Down ratios. J. Circuits Syst. Comput. 21(1) (2012) - [j8]Biswajit Maity, Soumya Gangula, Pradip Mandal:
Design and Implementation of an Area and Power Efficient Switched-Capacitor Based Embedded DC-DC Converter. J. Low Power Electron. 8(2): 207-222 (2012) - [j7]Kaushik Bhattacharyya, Pradip Mandal:
Improvement of Performance of Dynamically Reconfigurable Switched Capacitor Based Non-Overlap Rotational Time Interleaved Embedded DC-DC Converter. J. Low Power Electron. 8(2): 223-234 (2012) - [j6]Biswajit Maity, Pradip Mandal:
A High Performance Switched Capacitor-Based DC-DC Buck Converter Suitable for Embedded Power Management Applications. IEEE Trans. Very Large Scale Integr. Syst. 20(10): 1880-1885 (2012) - [c35]Debashis Mandal, Pradip Mandal, Tarun Kanti Bhattacharyya:
Spur suppression in frequency synthesizer using switched capacitor array. ISOCC 2012: 100-103 - [c34]Supriyo Maji, Pradip Mandal:
Effcient approaches to overcome non-convexity issues in analog design automation. ISQED 2012: 566-571 - [c33]Biswajit Maity, Pradip Mandal:
Design of Push-Pull Dynamic Leaker Circuit for a Low Power Embedded Voltage Regulator. VDAT 2012: 10-18 - [c32]Supriyo Maji, Pradip Mandal:
A Fast Equation Free Iterative Approach to Analog Circuit Sizing. VLSI Design 2012: 370-375 - [c31]Samiran Dam, Pradip Mandal:
Iterative Performance Model Upgradation in Geometric Programming Based Analog Circuit Sizing for Improved Design Accuracy. VLSI Design 2012: 376-381 - 2011
- [j5]Kaushik Bhattacharyya, Pradip Mandal:
Technique for the reduction of output voltage ripple of switched capacitor-based DC??DC converters. IET Circuits Devices Syst. 5(6): 442-450 (2011) - [j4]Kaushik Bhattacharyya, Pradip Mandal:
A dynamically reconfigurable NRTI switched-capacitor-based hybrid DC-DC converter suitable for embedded applications. Microelectron. J. 42(2): 422-431 (2011) - [j3]Vijaya Sankara Rao Pasupureddi, Pradip Mandal:
Current-mode full-duplex (CMFD) signaling for high-speed chip-to-chip interconnect. Microelectron. J. 42(7): 957-965 (2011) - [c30]Supriyo Maji, Pradip Mandal:
A geometric programming aided knowledge based approach for analog circuit synthesis and sizing. ACM Great Lakes Symposium on VLSI 2011: 411-414 - [c29]Sabyasachi Deyati, Pradip Mandal:
An automated design methodology for yield aware analog circuit synthesis in submicron technology. ISQED 2011: 229-235 - [c28]Supriyo Maji, Samiran Dam, Pradip Mandal:
Automatic generation of saturation constraints and performance expressions for geometric programming based analog circuit sizing. ISQED 2011: 761-768 - [c27]Supriyo Maji, Pradip Mandal:
A CAD methodology for automatic topology selection & sizing. SoCC 2011: 87-92 - [c26]Mrigank Sharad, Vijaya Sankara Rao Pasupureddi, Pradip Mandal:
A New Double Data Rate(DDR) Dual-Mode Duobinary Transmitter Architecture. VLSI Design 2011: 12-17 - 2010
- [c25]Vijaya Sankara Rao Pasupureddi, Pradip Mandal:
Current-mode echo cancellation for full-duplex chip-to-chip data communication. APCCAS 2010: 748-751 - [c24]Vijaya Sankara Rao Pasupureddi, Pradip Mandal:
A new power efficient current-mode 4-PAM transmitter interface for off-chip interconnect. APCCAS 2010: 959-962 - [c23]Samiran DasGupta, Pradip Mandal:
An Improvised MOS Transistor Model Suitable for Geometric Program Based Analog Circuit Sizing in Sub-micron Technology. VLSI Design 2010: 294-299 - [c22]Tamal Das, Pradip Mandal:
On-Chip Inductor-Less DC-DC Boost Converter with Non-overlapped Rotational-Interleaving Scheme. VLSI Design 2010: 324-329
2000 – 2009
- 2009
- [j2]Tamal Das, Pradip Mandal:
Switched-Capacitor Based Buck Converter Design Using Current Limiter. J. Low Power Electron. 5(3): 265-278 (2009) - [c21]S. Krishna Kumar, P. Uday Bhaskar, Santanu Chattopadhyay, Pradip Mandal:
Circuit Partitioning Using Particle Swarm Optimization for Pseudo-Exhaustive Testing. ARTCom 2009: 346-350 - [c20]Samiran DasGupta, Pradip Mandal:
An automated design approach for CMOS LDO regulators. ASP-DAC 2009: 510-515 - [c19]P. V. Ratna Kumar, Kaushik Bhattacharyya, Tamal Das, Pradip Mandal:
Improvement of power efficiency in switched capacitor DC-DC converter by shoot-through current elimination. ISLPED 2009: 81-86 - [c18]Vijaya Sankara Rao Pasupureddi, Pradip Mandal, Sunil Sachdev:
High-Speed Low-Current Duobinary Signaling Over Active Terminated Chip-to-Chip Interconnect. ISVLSI 2009: 73-78 - [c17]Tamal Das, Pradip Mandal:
Switched-Capacitor Based Buck Converter Design Using Current Limiter for Better Efficiency and Output Ripple. VLSI Design 2009: 181-186 - 2008
- [c16]Saurav Bandyopadhyay, Pradip Mandal, Stephen E. Ralph, Kenneth Pedrotti:
Integrated TIA-Equalizer for High Speed Optical Link. VLSI Design 2008: 208-213 - [c15]Kaushik Bhattacharyya, Pradip Mandal:
A Low Voltage, Low Ripple, on Chip, Dual Switch-Capacitor Based Hybrid DC-DC Converter. VLSI Design 2008: 661-666 - 2007
- [c14]A. V. Rejeesh, Pradip Mandal:
A Fractional Frequency Synthesizer Using Frequency Locked Loop. ICECS 2007: 1392-1395 - 2006
- [c13]Kshitij Yadav, Pradip Mandal:
Design and Analysis of a VHF OTA-C Cell for Optimum Phase Response. APCCAS 2006: 1599-1602 - [c12]R. G. Raghavendra, Pradip Mandal:
An On-Chip Voltage Regulator with Improved Load Regulation and Light Load Power Efficiency. VLSI Design 2006: 331-336 - 2005
- [c11]Gunjan Mandal, Pradip Mandal:
Low-power LVDS receiver for 1.3Gbps physical layer (PHY) interface. ISCAS (3) 2005: 2180-2183 - [c10]S. S. Prasad, Pradip Mandal:
A single circuit solution for voltage sensors. ISCAS (4) 2005: 3865-3868 - [c9]Debashis Mandal, Pradip Mandal:
High voltage tolerant output buffer design for mixed voltage interfaces. ISCAS (5) 2005: 4277-4280 - [c8]Ashis Maity, R. G. Raghavendra, Pradip Mandal:
On-Chip Voltage Regulator with Improved Transient Response. VLSI Design 2005: 522-527 - 2004
- [c7]Gunjan Mandal, Pradip Mandal:
Low power LVDS transmitter with low common mode variation for 1GB/s-per pin operation. ISCAS (1) 2004: 1120-1123 - [c6]S. S. Prasad, Pradip Mandal:
A CMOS Beta Multiplier Voltage Reference with Improved Temperature Performance and Silicon Tunability. VLSI Design 2004: 551- - [c5]Pradip Mandal:
A Narrow Pulse- Suppressing Filter For Input Buffer. VLSI Design 2004: 701-704 - 2001
- [j1]Pradip Mandal, V. Visvanathan:
CMOS op-amp sizing using a geometric programming formulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20(1): 22-38 (2001)
1990 – 1999
- 1999
- [c4]Pradip Mandal, V. Visvanathan:
A New Approach for CMOS Op-Amp Synthesis. VLSI Design 1999: 189-195 - 1997
- [c3]Pradip Mandal, V. Visvanathan:
A Self-Biased High Performance Folded Cascode CMOS Op-Amp. VLSI Design 1997: 429-434 - 1996
- [c2]Pradip Mandal, V. Visvanathan:
Design of high performance two stage CMOS cascode op-amps with stable biasing. VLSI Design 1996: 234-237 - 1993
- [c1]Pradip Mandal, V. Visvanathan:
Macromodeling of the A.C. characteristics of CMOS Op-amps. ICCAD 1993: 334-340
Coauthor Index
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last updated on 2024-04-25 05:47 CEST by the dblp team
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