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Vishnu C. Vimjam

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2007
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Vishnu C. Vimjam:
Strategies for SAT-Based Formal Verification. Virginia Tech, Blacksburg, VA, USA, 2007
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Vishnu C. Vimjam, Michael S. Hsiao:
Explicit Safety Property Strengthening in SAT-based Induction. VLSI Design 2007: 63-68
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Vishnu C. Vimjam, M. Enamul Amyeen, Ruifeng Guo, Srikanth Venkataraman, Michael S. Hsiao, Kai Yang:
Using Scan-Dump Values to Improve Functional-Diagnosis Methodology. VTS 2007: 231-238
2006
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Vishnu C. Vimjam, Michael S. Hsiao:
Fast illegal state identification for improving SAT-based induction. DAC 2006: 241-246
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Manan Syal, Kameshwar Chandrasekar, Vishnu C. Vimjam, Michael S. Hsiao, Yi-Shing Chang, Sreejit Chakravarty:
A Study of Implication Based Pseudo Functional Testing. ITC 2006: 1-10
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Vishnu C. Vimjam, Michael S. Hsiao:
Efficient Fault Collapsing via Generalized Dominance Relations. VTS 2006: 258-265
2005
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Vishnu C. Vimjam, Manan Syal, Michael S. Hsiao:
Untestable fault identification through enhanced necessary value assignments. ACM Great Lakes Symposium on VLSI 2005: 176-181
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Vishnu C. Vimjam, Michael S. Hsiao:
Increasing the deducibility in CNF instances for efficient SAT-based bounded model checking. HLDVT 2005: 184-191

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