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ORCIDAllon Adir
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2020 – today
- 2023
[j4]Ehud Aharoni
, Allon Adir, Moran Baruch, Nir Drucker, Gilad Ezov, Ariel Farkash, Lev Greenberg, Ramy Masalha, Guy Moshkowich, Dov Murik, Hayim Shaul, Omri Soceanu:
HeLayers: A Tile Tensors Framework for Large Neural Networks on Encrypted Data. Proc. Priv. Enhancing Technol. 2023(1): 325-342 (2023)- [c26]Panagiotis I. Radoglou-Grammatikis, Athanasios Liatifis, Christos Dalamagkas, Alexios Lekidis, Konstantinos Voulgaridis, Thomas Lagkas, Nikolaos Fotos, Sofia-Anna Menesidou, Thomas Krousarlis, Pedro Ruzafa Alcazar, Juan Francisco Martinez, Antonio F. Skarmeta, Alberto Molinuevo Martín, Iñaki Angulo, Jesus Villalobos Nieto, Hristo Koshutanski, Rodrigo Diaz Rodriguez, Ilias Siniosoglou, Orestis Mavropoulos, Konstantinos Kyranou, Theocharis Saoulidis, Allon Adir, Ramy Masalha, Emanuele Bellini, Nicholas Kolokotronis, Stavros Shiaeles, Jose Garcia Franquelo, George Lalas, Andreas Zalonis, Antonis Voulgaridis, Angelina D. Bintoudi, Konstantinos Votis, David Pampliega, Panagiotis G. Sarigiannidis:
ELECTRON: An Architectural Framework for Securing the Smart Electrical Grid with Federated Detection, Dynamic Risk Assessment and Self-Healing. ARES 2023: 51:1-51:8 - 2022
- [c25]Allon Adir, Ehud Aharoni, Nir Drucker, Eyal Kushnir, Ramy Masalha, Michael Mirkin, Omri Soceanu:
Privacy-Preserving Record Linkage Using Local Sensitive Hash and Private Set Intersection. ACNS Workshops 2022: 398-424 - [i2]Allon Adir, Ehud Aharoni, Nir Drucker, Eyal Kushnir, Ramy Masalha, Michael Mirkin, Omri Soceanu:
Privacy-preserving record linkage using local sensitive hash and private set intersection. CoRR abs/2203.14284 (2022) - 2020
- [c24]Omri Soceanu, Allon Adir, Ehud Aharoni, Lev Greenberg, Habtamu Abie:
A Cloud-Based Anomaly Detection for IoT Big Data. CPS4CIP 2020: 87-104 - [i1]Ehud Aharoni, Allon Adir, Moran Baruch, Gilad Ezov, Ariel Farkash, Lev Greenberg, Ramy Masalha, Dov Murik, Omri Soceanu:
Tile Tensors: A versatile data structure with descriptive shapes for homomorphic encryption. CoRR abs/2011.01805 (2020)
2010 – 2019
- 2017
- [c23]Hanna Mazzawi, Gal Dalal, David Rozenblat, Liat Ein-Dor, Matan Ninio, Ofer Lavi, Allon Adir, Ehud Aharoni, Einat Kermany:
Anomaly Detection in Large Databases Using Behavioral Patterning. ICDE 2017: 1140-1149 - [c22]Shelly Garion, Hillel Kolodner, Allon Adir, Ehud Aharoni, Lev Greenberg:
Big data analysis of cloud storage logs using spark. SYSTOR 2017: 30:1 - 2014
- [c21]Allon Adir, Dave Goodman, Daniel Hershcovich, Oz Hershkovitz, Bryan G. Hickerson, Karen Holtz, Wisam Kadry, Anatoly Koyfman, John M. Ludden, Charles Meissner, Amir Nahir, Randall R. Pratt, Mike Schiffli, Brett St. Onge, Brian W. Thompto, Elena Tsanko, Avi Ziv:
Verification of Transactional Memory in POWER8. DAC 2014: 58:1-58:6 - [c20]Allon Adir, Alex Goryachev, Lev Greenberg, Tamer Salman:
Using a High-Level Test Generation Expert System for Testing In-Car Networks. DAC 2014: 134:1-134:6 - 2013
- [c19]Andreas Abel, Allon Adir, Torsten Blochwitz, Lev Greenberg, Tamer Salman:
Development and Verification of Complex Hybrid Systems Using Synthesizable Monitors. Haifa Verification Conference 2013: 182-198 - [c18]Kanad Basu, Prabhat Mishra, Priyadarsan Patra, Amir Nahir, Allon Adir:
Dynamic Selection of Trace Signals for Post-Silicon Debug. MTV 2013: 62-67 - 2012
- [j3]Allon Adir, Amir Nahir, Avi Ziv:
Concurrent Generation of Concurrent Programs for Post-Silicon Validation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31(8): 1297-1302 (2012) - [c17]Allon Adir, Alex Goryachev, Lev Greenberg, Tamer Salman, Gil Shurek:
A New Test-Generation Methodology for System-Level Verification of Production Processes. Haifa Verification Conference 2012: 178-192 - 2011
- [c16]Allon Adir, Amir Nahir, Gil Shurek, Avi Ziv, Charles Meissner, John Schumann:
Leveraging pre-silicon verification resources for the post-silicon validation of the IBM POWER7 processor. DAC 2011: 569-574 - [c15]Allon Adir, Maxim Golubev, Shimon Landa, Amir Nahir, Gil Shurek, Vitali Sokhin, Avi Ziv:
Threadmill: a post-silicon exerciser for multi-threaded processors. DAC 2011: 860-865 - [c14]Allon Adir, Shady Copty, Shimon Landa, Amir Nahir, Gil Shurek, Avi Ziv, Charles Meissner, John Schumann:
A unified methodology for pre-silicon verification and post-silicon validation. DATE 2011: 1590-1595 - [c13]Allon Adir, Ronen Levy, Tamer Salman:
Dynamic Test Data Generation for Data Intensive Applications. Haifa Verification Conference 2011: 219-233 - 2010
- [c12]Allon Adir, Amir Nahir, Avi Ziv, Charles Meissner, John Schumann:
Reaching Coverage Closure in Post-silicon Validation. Haifa Verification Conference 2010: 60-75 - [c11]John M. Ludden, Michal Rimon, Bryan G. Hickerson, Allon Adir:
Advances in Simultaneous Multithreading Testcase Generation Methods. Haifa Verification Conference 2010: 146-160
2000 – 2009
- 2007
- [c10]Allon Adir, Sigal Asaf, Laurent Fournier, Itai Jaeger, Ofer Peled:
A Framework for the Validation of Processor Architecture Compliance. DAC 2007: 902-905 - 2006
- [c9]Michal Rimon, Yossi Lichtenstein, Allon Adir, Itai Jaeger, Michael Vinov, S. Johnson, D. Jani:
Addressing Test Generation Challenges for Configurable Processor Verification. HLDVT 2006: 95-101 - [c8]Allon Adir, Laurent Fournier, Yoav Katz, Anatoly Koyfman:
DeepTrans - Extending the Model-based Approach to Functional Verification of Address Translation Mechanisms. HLDVT 2006: 102-110 - 2005
- [c7]Allon Adir, Hezi Azatchi, Eyal Bin, Ofer Peled, Kirill Shoikhet:
A generic micro-architectural test plan approach for microprocessor verification. DAC 2005: 769-774 - [c6]Allon Adir, Yaron Arbetman, Bella Dubrov, Yossi Lichtenstein, Michal Rimon, Michael Vinov, Massimo A. Calligaro, Andrew Cofler, Gabriel Duffy:
VLIW: a case study of parallelism verification. DAC 2005: 779-782 - 2004
- [j2]Allon Adir, Eli Almog, Laurent Fournier, Eitan Marcus, Michal Rimon, Michael Vinov, Avi Ziv:
Genesys-Pro: Innovations in Test Program Generation for Functional Processor Verification. IEEE Des. Test Comput. 21(2): 84-93 (2004) - 2003
- [j1]Allon Adir, Hagit Attiya, Gil Shurek:
Information-Flow Models for Shared Memory with an Application to the PowerPC Architecture. IEEE Trans. Parallel Distributed Syst. 14(5): 502-515 (2003) - [c5]Allon Adir, Eyal Bin, Ofer Peled, Avi Ziv:
Piparazzi: a test program generator for micro-architecture flow verification. HLDVT 2003: 23-28 - [c4]Allon Adir, Roy Emek, Yoav Katz, Anatoly Koyfman:
DeepTrans - A Model-based Approach to Functional Verification of Address Translation Mechanisms. MTV 2003: 3-6 - 2002
- [c3]Allon Adir, Gil Shurek:
Generating concurrent test-programs with collisions for multi-processor verification. HLDVT 2002: 77-82 - [c2]Allon Adir, Roy Emek, Eitan Marcus:
Adaptive test program generation: planning for the unplanned. HLDVT 2002: 83-88 - 2001
- [c1]Allon Adir, Eitan Marcus, Michal Rimon, Amir Voskoboynik:
Improving test quality through resource reallocation. HLDVT 2001: 64-69
Coauthor Index
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