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2020 – today
- 2024
[j50]Junyi Ruan
, Junmin Jiang, Chenzhou Ding, Yunxiao Li, Yanhui Wu, Ka Nang Leung, Xun Liu:
A 2.8 μs Response Time 95.1% Efficiency Hybrid Boost Converter With RHP Zero Elimination for Fast-Transient Applications. IEEE J. Solid State Circuits 59(9): 2960-2970 (2024)- [j49]Yichen Zhang, Chaowei Tang, Yanqi Zheng, Xian Tang, Ka Nang Leung:
An Adaptive Zero-Current Detector for Single-Inductor Multiple-Output DC-DC Converter With Full-Wave Current Sensor. IEEE Trans. Very Large Scale Integr. Syst. 32(9): 1764-1768 (2024) - [c34]Junyi Ruan, Junmin Jiang, Chenzhou Ding, Kai Yuan, Ka Nang Leung, Xun Liu:
A Li-ion-Battery-Input 1-to-6V-Output Bootstrap-Free Hybrid Buck-or-Boost Converter Without RHP Zero Achieving 97.3% Peak Efficiency 6μs Recovery Time and 1.13μs/V DVS Rate. ISSCC 2024: 148-150 - 2023
- [c33]Chao Gao, Shan He, Pooya Davari, Frede Blaabjerg, Ka Nang Leung, Poh Chiang Loh:
A Decentralized Control Scheme for Active Power Filter Parallel System. IECON 2023: 1-5 - 2022
- [j48]Yuet Ho Woo, Jianxin Yang, Jianping Guo, Yanqi Zheng, Ka Nang Leung:
A Hybrid Low-Dropout Regulator With Load Regulation Correction. IEEE Access 10: 25106-25113 (2022) - [j47]Yuet Ho Woo, Jianxin Yang, Junwen Li, Jianping Guo, Yanqi Zheng, Ka Nang Leung:
An Analog-Assisted Digital LDO With Dynamic-Biasing Asynchronous Comparator. IEEE Access 10: 56996-57002 (2022) - [j46]Yong Zhou, Qingqing Cheng, Junwen Li, Yanqi Zheng, Ka Nang Leung:
Full-Wave Sense-FET-Based Inductor-Current Sensor With Wide Dynamic Range for Buck Converters. IEEE Trans. Circuits Syst. II Express Briefs 69(4): 2041-2045 (2022) - [j45]Jianxin Yang, Bin Li, Ka Nang Leung, Zhijian Chen, Yanqi Zheng:
A Triple-Mode DC-DC Converter With Wide Input and Load Ranges for Energy Harvesting in IoT Edge Nodes. IEEE Trans. Circuits Syst. II Express Briefs 69(12): 4694-4698 (2022) - [c32]Yajun Lin, Haozheng Wan, Jianxin Yang, Ka Nang Leung:
An Ultra-Low-Supply Output-Capacitorless LDO with Signal- and Transient-Enhancement. APCCAS 2022: 1-5 - 2021
- [j44]Tin Wai Mui, Jianxin Yang, Yajun Lin, Yong Zhou, Yanqi Zheng, Jianping Guo, Ka Nang Leung:
A dual-power-path charge pump for solar-energy harvesting. Int. J. Circuit Theory Appl. 49(11): 3894-3907 (2021) - 2020
- [j43]Xiangbin Ding, Pak Kwong Chan, Ka Nang Leung:
A 40nm CMOS Hysteretic Buck DC-DC Converter With Digital-Controlled Power-Driving-Tracked-Duration Current Pump. IEEE Access 8: 177374-177384 (2020) - [j42]Yong Zhou, Xiaohui Lin, Jianxin Yang, Yanqi Zheng, Ka Nang Leung:
Adaptive-biased sense-FET-based inductor-current sensor for 10-MHz buck converter. Int. J. Circuit Theory Appl. 48(6): 953-964 (2020) - [j41]Cheuk Ho Hung, Yanqi Zheng, Jianping Guo, Ka Nang Leung:
Bandwidth and Slew Rate Enhanced OTA With Sustainable Dynamic Bias. IEEE Trans. Circuits Syst. II Express Briefs 67-II(4): 635-639 (2020) - [c31]Yong Zhou, Yanqi Zheng, Ka Nang Leung:
An Output-Capacitorless Low-Dropout Regulator with High Slew Rate and Unity-Gain Bandwidth. ISCAS 2020: 1-5
2010 – 2019
- 2019
- [j40]Yuet Ho Woo, Ka Nang Leung, Yanqi Zheng, Jianping Guo:
Low-dropout regulator with dual cross-coupled current mirrors. Int. J. Circuit Theory Appl. 47(11): 1869-1876 (2019) - 2018
- [j39]Zhao Wang, Biao Chen, Lei Zhu, Yanqi Zheng, Jianping Guo, Dihu Chen, Marco Ho, Ka Nang Leung:
A 3.3-MHz fast-response load-dependent-on/off-time buck-boost DC-DC converter with low-noise hybrid full-wave current sensor. Microelectron. J. 74: 1-12 (2018) - [j38]Shi Bu, Ka Nang Leung, Yan Lu, Jianping Guo, Yanqi Zheng:
A Fully Integrated Low-Dropout Regulator With Differentiator-Based Active Zero Compensation. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(10): 3578-3591 (2018) - 2017
- [j37]Ming Wai Lau, Kai Ho Mak, Ka Nang Leung, Jianping Guo, Wang Ling Goh:
Enhanced active-feedback frequency compensation with on-chip-capacitor reduction feature for amplifiers with large capacitive load. Int. J. Circuit Theory Appl. 45(12): 2119-2133 (2017) - 2016
- [j36]Jianping Guo, Marco Ho, Ka Nang Leung, Guangxiang Li:
Digitally-assisted constant-on-time dynamic-biasing technique for bandwidth and slew-rate enhancement in ultra-low-power low-dropout regulator. Int. J. Circuit Theory Appl. 44(2): 504-513 (2016) - [j35]Marco Ho, Jianping Guo, Tin Wai Mui, Kai Ho Mak, Wang Ling Goh, Hiu Ching Poon, Shi Bu, Ming Wai Lau, Ka Nang Leung:
A Two-Stage Large-Capacitive-Load Amplifier With Multiple Cross-Coupled Small-Gain Stages. IEEE Trans. Very Large Scale Integr. Syst. 24(7): 2580-2592 (2016) - [c30]Biao Chen, Lei Zhu, Yanqi Zheng, Jianping Guo, Marco Ho, Ka Nang Leung, Dihu Chen, Yang Liu:
A Shared-MSB delay-line-based ADC with simultaneous quantization for digital control single-inductor-multiple-output DC-DC converter. ISIC 2016: 1-4 - [c29]Jingbin Jia, Marco Ho, Ka Nang Leung, Jianping Guo:
A regulated voltage multiplier for passive RFID Tag. ISIC 2016: 1-4 - [c28]Lei Zhu, Biao Chen, Yanqi Zheng, Jianping Guo, Marco Ho, Ka Nang Leung, Dihu Chen, Yang Liu:
A fast-response buck-boost DC-DC converter with constructed full-wave current sensor. ISIC 2016: 1-4 - 2015
- [j34]Kai Ho Mak, Ming Wai Lau, Jianping Guo, Tin Wai Mui, Marco Ho, Wang Ling Goh, Ka Nang Leung:
A 0.7V 24µA Hybrid OTA Driving 15 nF Capacitive Load With 1.46 MHz GBW. IEEE J. Solid State Circuits 50(11): 2750-2757 (2015) - [j33]Hao Wang, Xian Tang, Chiu-sing Choy, Ka Nang Leung, Kong-Pang Pun:
A 5.4-mW 180-cm Transmission Distance 2.5-Mb/s Advanced Techniques-Based Novel Intrabody Communication Receiver Analog Front End. IEEE Trans. Very Large Scale Integr. Syst. 23(12): 2829-2841 (2015) - [c27]Yanqi Zheng, Marco Ho, Ka Nang Leung, Jianping Guo:
A fixed-frequency auto-buck-boost SIMO DC-DC converter with duty-cycle redistribution and duty-predicted current control. ISCAS 2015: 225-228 - [c26]Shi Bu, Hing Wa Tse, Ka Nang Leung, Jianping Guo, Marco Ho:
Gain and slew rate enhancement for amplifiers through current starving and feeding. ISCAS 2015: 2073-2076 - [c25]Kai Ho Mak, Marco Ho, Ka Nang Leung, Wang Ling Goh:
Design considerations of STCB OTA in CMOS 65nm with large capacitive loads. ISCAS 2015: 2465-2468 - [c24]Yanqi Zheng, Marco Ho, Ka Nang Leung, Jianping Guo, Hua Chen:
A robust cross-regulation-suppressed single-inductor multiple-output dc-dc converter with duty-regulated comparator control. MWSCAS 2015: 1-4 - [c23]Yanqi Zheng, Marco Ho, Ka Nang Leung, Jianping Guo, Biao Chen:
A digital-control sensorless current-mode boost converter with non-zero error bin compensation and seamless mode transition. SoCC 2015: 94-99 - 2014
- [j32]Tin Wai Mui, Marco Ho, Kai Ho Mak, Jianping Guo, Hua Chen, Ka Nang Leung:
An Area-Efficient 96.5%-Peak-Efficiency Cross-Coupled Voltage Doubler With Minimum Supply of 0.8 V. IEEE Trans. Circuits Syst. II Express Briefs 61-II(9): 656-660 (2014) - [j31]Kai Ho Mak, Ka Nang Leung:
A Signal- and Transient-Current Boosting Amplifier for Large Capacitive Load Applications. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(10): 2777-2785 (2014) - [c22]Shi Bu, Marco Ho, Ka Nang Leung, Jianping Guo:
Load regulation cancellation based on adaptive body bias for STC-LDOs. APCCAS 2014: 101-104 - [c21]Marco Ho, Ka Nang Leung, Pui Ying Or, Jianping Guo:
Analysis of CMOS low-dropout regulator - Power-supply rejection ratio. APCCAS 2014: 109-112 - [c20]Marco Ho, Shi Bu, Yanqi Zheng, Ka Nang Leung, Jianping Guo:
A 124-dB double-gain-boosted cascode amplifier with 92% rail-to-rail output swing. APCCAS 2014: 181-184 - 2013
- [j30]Hua Chen, Ka Nang Leung:
A transient-improved low-dropout regulator with nested flipped voltage follower structure. Int. J. Circuit Theory Appl. 41(10): 1016-1026 (2013) - [j29]Kwan Wai Li, Ka Nang Leung, Lincoln Lai Kan Leung:
Sub-mW $LC$ Dual-Input Injection-Locked Oscillator for Autonomous WBSNs. IEEE Trans. Very Large Scale Integr. Syst. 21(3): 546-553 (2013) - 2012
- [j28]Jingbin Jia, Ka Nang Leung:
Improved active-diode circuit used in voltage doubler. Int. J. Circuit Theory Appl. 40(2): 165-173 (2012) - [j27]Jianping Guo, Ka Nang Leung:
A CMOS voltage regulator for passive RFID tag ICs. Int. J. Circuit Theory Appl. 40(4): 329-340 (2012) - [j26]Yanqi Zheng, Hua Chen, Ka Nang Leung:
A Fast-Response Pseudo-PWM Buck Converter With PLL-Based Hysteresis Control. IEEE Trans. Very Large Scale Integr. Syst. 20(7): 1167-1174 (2012) - [c19]Kwan Wai Li, Ka Nang Leung:
A low-power MICS fractional-N frequency synthesizer for implantable biomedical systems. APCCAS 2012: 168-171 - 2011
- [j25]Marco Ho, Ka Nang Leung:
Dynamic Bias-Current Boosting Technique for Ultralow-Power Low-Dropout Regulator in Biomedical Applications. IEEE Trans. Circuits Syst. II Express Briefs 58-II(3): 174-178 (2011) - [c18]Ka Nang Leung, Marco Ho, Jianping Guo, Pui Ying Or:
Development of energy-efficient fast-transient CMOS low-dropout regulators for SoC applications. ISCAS 2011: 305-308 - 2010
- [j24]Ka Nang Leung, Felix Kok Man Cheung, Marco Ho, Hiu Ching Poon, Pui Ying Or:
A 1.9 µW Transient-Enhanced Low-Dropout Regulator with Voltage-Spike Suppression. J. Low Power Electron. 6(1): 126-132 (2010) - [j23]Ka Nang Leung, Chiu-sing Choy, Kong-Pang Pun, Lincoln Lai Kan Leung, Jianping Guo, Yuen Sum Ng, Chi Fat Chan, Weiwei Shi, Yang Hong, Marco Ho, Ki-Leung Mak, Yanqing Ai:
RF Module Design of Passive UHF RFID Tag Implemented in CMOS 90-nm Technology. J. Low Power Electron. 6(1): 141-149 (2010) - [j22]Pui Ying Or, Ka Nang Leung:
An Output-Capacitorless Low-Dropout Regulator With Direct Voltage-Spike Detection. IEEE J. Solid State Circuits 45(2): 458-466 (2010) - [j21]Chi Fat Chan, Kong-Pang Pun, Ka Nang Leung, Jianping Guo, Lincoln Lai Kan Leung, Oliver Chiu-sing Choy:
A Low-Power Continuously-Calibrated Clock Recovery Circuit for UHF RFID EPC Class-1 Generation-2 Transponders. IEEE J. Solid State Circuits 45(3): 587-599 (2010) - [j20]Jianping Guo, Ka Nang Leung:
A 6- μ W Chip-Area-Efficient Output-Capacitorless LDO in 90-nm CMOS Technology. IEEE J. Solid State Circuits 45(9): 1896-1905 (2010) - [j19]Marco Ho, Ka Nang Leung, Ki-Leung Mak:
A Low-Power Fast-Transient 90-nm Low-Dropout Regulator With Multiple Small-Gain Stages. IEEE J. Solid State Circuits 45(11): 2466-2475 (2010) - [j18]Alex K. Y. Wong, Ka Nang Leung, Kong-Pang Pun, Yuan-Ting Zhang:
A 0.5-Hz High-Pass Cutoff Dual-Loop Transimpedance Amplifier for Wearable NIR Sensing Device. IEEE Trans. Circuits Syst. II Express Briefs 57-II(7): 531-535 (2010) - [j17]Ka Nang Leung, Yuen Sum Ng:
A CMOS Low-Dropout Regulator With a Momentarily Current-Boosting Voltage Buffer. IEEE Trans. Circuits Syst. I Regul. Pap. 57-I(9): 2312-2319 (2010) - [j16]Pui Ying Or, Ka Nang Leung:
A Fast-Transient Low-Dropout Regulator With Load-Tracking Impedance Adjustment and Loop-Gain Boosting Technique. IEEE Trans. Circuits Syst. II Express Briefs 57-II(10): 757-761 (2010) - [j15]Ka Nang Leung, Yuan Yen Mai, Philip K. T. Mok:
A Chip-Area Efficient Voltage Regulator for VLSI Systems. IEEE Trans. Very Large Scale Integr. Syst. 18(12): 1757-1762 (2010)
2000 – 2009
- 2009
- [c17]Wen Fan, Oliver Chiu-sing Choy, Ka Nang Leung:
Robust and Low Complexity Packet Detector Design for MB-OFDM UWB. ISCAS 2009: 693-696 - [c16]Chi Fat Chan, Weiwei Shi, Kong-Pang Pun, Lincoln Lai Kan Leung, Ka Nang Leung, Oliver Chiu-sing Choy:
A Low-power Signal Processing Front-end and Decoder for UHF Passive RFID Transponders. ISCAS 2009: 1581-1584 - [c15]Jianping Guo, Ka Nang Leung:
A Fold-back Current-limit Circuit with Load-insensitive Quiescent Current for CMOS Low Dropout Regulator. ISCAS 2009: 2417-2420 - [c14]Jingbin Jia, Ka Nang Leung:
A Single-inductor Dual-output Pseudo-DCM/CCM Buck and Boost Converter with Adaptive DC Current Compensation. ISCAS 2009: 2641-2644 - 2008
- [j14]Alex K. Y. Wong, Kong-Pang Pun, Yuan-Ting Zhang, Ka Nang Leung:
A Low-Power CMOS Front-End for Photoplethysmographic Signal Acquisition With Robust DC Photocurrent Rejection. IEEE Trans. Biomed. Circuits Syst. 2(4): 280-288 (2008) - [j13]Tsz Yin Man, Ka Nang Leung, Chi Yat Leung, Philip K. T. Mok, Mansun Chan:
Development of Single-Transistor-Control LDO Based on Flipped Voltage Follower for SoC. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(5): 1392-1401 (2008) - [j12]Siu-Kei Tang, Kong-Pang Pun, Oliver Chiu-sing Choy, Cheong-Fat Chan, Ka Nang Leung:
A Fully Differential Band-Selective Low-Noise Amplifier for MB-OFDM UWB Receivers. IEEE Trans. Circuits Syst. II Express Briefs 55-II(7): 653-657 (2008) - [c13]Misteltein Pak-Kee Chan, Oliver Chiu-sing Choy, Kong-Pang Pun, Cheong-Fat Chan, Alex Ka Nang Leung:
Enhanced channel selection using digital low-IF in Weaver receiver architecture. APCCAS 2008: 33-36 - [c12]Yang Hong, Chi Fat Chan, Jianping Guo, Yuen Sum Ng, Weiwei Shi, Lincoln Lai Kan Leung, Ka Nang Leung, Chiu-sing Choy, Kong-Pang Pun:
Design of passive UHF RFID tag in 130nm CMOS technology. APCCAS 2008: 1371-1374 - [c11]Ka Nang Leung, Yanqi Zheng:
Compensation-Capacitor Free Pseudo Three-Stage Amplifier with Large Capacitive Loads. DELTA 2008: 7-10 - [c10]Chun Yu Cheng, Ka Nang Leung, Yi Ki Sun, Pui Ying Or:
Design of a Low-Voltage CMOS Charge Pump. DELTA 2008: 342-345 - 2007
- [j11]Sai Kit Lau, Philip K. T. Mok, Ka Nang Leung:
A Low-Dropout Regulator for SoC With Q-Reduction. IEEE J. Solid State Circuits 42(3): 658-664 (2007) - 2006
- [j10]Man Siu, Philip K. T. Mok, Ka Nang Leung, Yat-Hei Lam, Wing-Hung Ki:
A voltage-mode PWM buck regulator with end-point prediction. IEEE Trans. Circuits Syst. II Express Briefs 53-II(4): 294-298 (2006) - 2005
- [j9]Chi Yat Leung, Philip K. T. Mok, Ka Nang Leung:
A 1-V integrated current-mode boost converter in standard 3.3/5-V CMOS technologies. IEEE J. Solid State Circuits 40(11): 2265-2274 (2005) - [j8]Chi Yat Leung, Philip K. T. Mok, Ka Nang Leung, Mansun Chan:
An integrated CMOS current-sensing circuit for low-Voltage current-mode buck regulator. IEEE Trans. Circuits Syst. II Express Briefs 52-II(7): 394-397 (2005) - [j7]Hoi Lee, Philip K. T. Mok, Ka Nang Leung:
Design of low-power analog drivers based on slew-rate enhancement circuits for CMOS low-dropout regulators. IEEE Trans. Circuits Syst. II Express Briefs 52-II(9): 563-567 (2005) - 2004
- [c9]Philip K. T. Mok, Ka Nang Leung:
Design considerations of recent advanced low-voltage low-temperature-coefficient CMOS bandgap voltage reference. CICC 2004: 635-642 - [c8]Chi Yat Leung, Ka Nang Leung, Philip K. T. Mok:
Design of a 1.5-V high-order curvature-compensated CMOS bandgap reference. ISCAS (1) 2004: 48-52 - [c7]Ka Nang Leung, Philip K. T. Mok, Sai Kit Lau:
A low-voltage CMOS low-dropout regulator with enhanced loop response. ISCAS (1) 2004: 385-388 - [c6]Chi Yat Leung, Philip K. T. Mok, Ka Nang Leung:
A 1.2V buck converter with a novel on-chip low-voltage current-sensing scheme. ISCAS (5) 2004: 824-827 - 2003
- [j6]Ka Nang Leung, Philip K. T. Mok:
A CMOS voltage reference based on weighted ΔVGS for CMOS low-dropout linear regulators. IEEE J. Solid State Circuits 38(1): 146-150 (2003) - [j5]Ka Nang Leung, Philip K. T. Mok, Chi Yat Leung:
A 2-V 23-μA 5.3-ppm/°C curvature-compensated CMOS bandgap voltage reference. IEEE J. Solid State Circuits 38(3): 561-564 (2003) - [j4]Ka Nang Leung, Philip K. T. Mok:
A capacitor-free CMOS low-dropout regulator with damping-factor-control frequency compensation. IEEE J. Solid State Circuits 38(10): 1691-1702 (2003) - [j3]Hoi Lee, Ka Nang Leung, Philip K. T. Mok:
A dual-path bandwidth extension amplifier topology with dual-loop parallel compensation. IEEE J. Solid State Circuits 38(10): 1739-1744 (2003) - 2002
- [j2]Ka Nang Leung, Philip K. T. Mok:
A sub-1-V 15-ppm/°C CMOS bandgap voltage reference without requiring low threshold voltage device. IEEE J. Solid State Circuits 37(4): 526-530 (2002) - [c5]Ka Nang Leung, Philip K. T. Mok, Chi Yat Leung:
A 2-V 23-μA 5.3-ppm/°C 4th-order curvature-compensated CMOS bandgap reference. CICC 2002: 457-460 - 2000
- [j1]Ka Nang Leung, Philip K. T. Mok, Wing-Hung Ki, Johnny K. O. Sin:
Three-stage large capacitive load amplifier with damping-factor-control frequency compensation. IEEE J. Solid State Circuits 35(2): 221-230 (2000) - [c4]Ka Nang Leung, Philip K. T. Mok, Wing-Hung Ki, Johnny K. O. Sin:
Analysis on an alternative structure of damping-factor-control frequency compensation. ISCAS 2000: 545-548
1990 – 1999
- 1999
- [c3]Ka Nang Leung, Philip K. T. Mok, Wing-Hung Ki:
Right-half-plane zero removal technique for low-voltage low-power nested Miller compensation CMOS amplifier. ICECS 1999: 599-602 - [c2]Ka Nang Leung, Philip K. T. Mok, Wing-Hung Ki:
A novel frequency compensation technique for low-voltage low-dropout regulator. ISCAS (5) 1999: 102-105 - [c1]Ka Nang Leung, Philip K. T. Mok, Wing-Hung Ki:
Optimum nested Miller compensation for low-voltage low-power CMOS amplifier design. ISCAS (2) 1999: 616-619
Coauthor Index
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