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S. DasGupta
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2020 – today
- 2024
- [c19]Jyoti Patel, Navjeet Bagga, Vivek Kumar, S. Dasgupta:
Small Signal Analysis of Nanosheet Transistor for sub-THz Frequency Considering Intersheet Capacitances and Modified Admittance Parameters. DRC 2024: 1-2 - [c18]Sunil Rathore, Navjeet Bagga, S. Dasgupta:
Self-Heating and Process-Induced Threshold Voltage Aware Reliability and Aging Analysis of Forksheet FET. IRPS 2024: 65
2010 – 2019
- 2015
- [c17]M. P. King, Jeramy Ray Dickerson, S. DasGupta, Matthew J. Marinella, R. J. Kaplar, Daniel Piedra, Min Sun, Tomás Palacios:
Trapping characteristics and parametric shifts in lateral GaN HEMTs with SiO2/AlGaN gate stacks. IRPS 2015: 2 - [c16]Pankaj Kumar Pal, Brajesh Kumar Kaushik, B. Anand, S. Dasgupta:
A comparative analysis of symmetric and asymmetric dual-k spacer FinFETs from device and circuit perspectives. ISQED 2015: 594-598 - [c15]Ruchi, S. Dasgupta:
Sensitivity analysis of DRV for various configurations of SRAM. VDAT 2015: 1-5 - 2014
- [j4]Jitendra Kanungo, S. Dasgupta:
Sinusoidal Clocked Sense-amplifier-Based Energy Recovery flip-Flops. J. Circuits Syst. Comput. 23(5) (2014) - [c14]Dilsukh Nehra, Pankaj Kumar Pal, Brajesh Kumar Kaushik, S. Dasgupta:
High permittivity spacer effects on junctionless FinFET based circuit/SRAM applications. VDAT 2014: 1-6 - 2013
- [j3]Jitendra Kanungo, S. Dasgupta:
Energy estimation for n-input Adiabatic Logic gate: a Proposed Analytical Model. J. Circuits Syst. Comput. 22(5) (2013) - [c13]Gopal Jee, S. Dasgupta:
Picard's method to solve a system of biaffine equations and its application to pole placement. CCA 2013: 966-971 - 2011
- [j2]Wei Song, D. Edwards, Z. Liu, S. Dasgupta:
Routing of asynchronous Clos networks. IET Comput. Digit. Tech. 5(6): 452-467 (2011) - [j1]Jitendra Kanungo, S. Dasgupta:
An Efficient Single Phase Adiabatic Logic and Its Application to Combinational and Sequential Design. J. Low Power Electron. 7(3): 381-392 (2011)
2000 – 2009
- 2002
- [c12]P. P. Mohanlal, M. R. Kaimal, S. Dasgupta:
Exact Fuzzy Modeling and Optimal control of a Launch Vehicle in the atmospheric phase. ICARCV 2002: 1275-1280
1990 – 1999
- 1998
- [c11]S. Grout, G. Ledenbach, R. G. Bushroe, P. Fisher, Donald Cottrell, David Mallis, S. DasGupta, Joseph Morrell, J. Sayah, R. Gupta, P. T. Patel, P. Adams:
Hierarchy - A CHDStd Tool for the Coming Deep Submicron Complex Design Crisis. ASP-DAC 1998: 257-260 - [c10]S. Grout, G. Ledenbach, R. G. Bushroe, P. Fisher, Donald Cottrell, David Mallis, S. DasGupta, Joseph Morrell, Amrich Chokhavtia:
CHDStd - application support for reusable hierarchical interconnect timing views. ISPD 1998: 75-79 - [c9]S. DasGupta:
Panel: Given that SEMATECH is levelling the semiconductor technology playing field, will corporate CAD (in particular, PD) tools continue to serve as enablers/differentiators of technology in the future? (panel). ISPD 1998: 86 - 1997
- [c8]R. G. Bushroe, S. DasGupta, A. Dengi, P. Fisher, S. Grout, G. Ledenbach, N. S. Nagaraj, R. Steele:
Chip hierarchical design system (CHDS): a foundation for timing-driven physical design into the 21st century. ISPD 1997: 212-217 - 1992
- [c7]R. Ghosh, S. Dasgupta:
A Simple Model for Lindhard Continuum Potential useful for Channeling Simulation. VLSI Design 1992: 336-338 - 1990
- [c6]S. DasGupta, M. Hohenberger, Len Trejo, T. Kaylani:
Effect of data compression of ERP sign preprocessed by FWT algorithm upon a neural network classifier. Annual Simulation Symposium 1990: 63-71 - [c5]F. Kampf, P. Koch, K. Roy, M. Sullivan, Z. Delalic, S. DasGupta:
Optimization of a digital neuron design. Annual Simulation Symposium 1990: 73-80
1980 – 1989
- 1989
- [c4]M. R. Brown, S. DasGupta:
Design of a general purpose meta-assembler for parallel processor environment in ISPS. Annual Simulation Symposium 1989: 105-117 - [c3]S. DasGupta, Kalapi Roy:
Description Language for a Neural Network Architecture. IAS 1989: 294-304 - 1987
- [c2]S. DasGupta, H. Chang:
Simulation of a computer with variable hardware and variable instruction set. Annual Simulation Symposium 1987: 1-12 - 1986
- [c1]J. M. Hancock, S. DasGupta:
Tutorial on parallel processing for design automation applications (tutorial session). DAC 1986: 69-77
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