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2010 – 2019
- 2017
[b1]Ruud van der Pas, Eric Stotzer, Christian Terboven:
Using OpenMP - The Next Step: Affinity, Accelerators, Tasking, and SIMD. MIT Press 2017, ISBN 9780262534789, pp. 1-392- 2014
- [c15]Gilbert Netzer, S. Lennart Johnsson, Daniel Ahlin, Eric Stotzer, Pekka Varis, Erwin Laure:
Exploiting DMA for Performance and Energy Optimized STREAM on a DSP. IPDPS Workshops 2014: 805-814 - [c14]Gaurav Mitra, Eric Stotzer, Ajay Jayaraj, Alistair P. Rendell:
Implementation and Optimization of the OpenMP Accelerator Model for the TI Keystone II Architecture. IWOMP 2014: 202-214 - 2013
- [c13]Eric Stotzer, Ajay Jayaraj, Murtaza Ali
, Arnon Friedmann, Gaurav Mitra, Alistair P. Rendell, Ian Lintault:
OpenMP on the Low-Power TI Keystone II ARM/DSP System-on-Chip. IWOMP 2013: 114-127 - 2012
- [j1]Eric J. Stotzer, Ernst L. Leiss:
Co-design of Compiler and Hardware Techniques to Reduce Program Code Size on a VLIW Processor. CLEI Electron. J. 15(2) (2012) - [c12]Murtaza Ali, Eric Stotzer, Francisco D. Igual, Robert A. van de Geijn:
Level-3 BLAS on the TI C6678 Multi-core DSP. SBAC-PAD 2012: 179-186 - [c11]Francisco D. Igual, Murtaza Ali, Arnon Friedmann, Eric Stotzer, Timothy Wentz, Robert A. van de Geijn:
Unleashing the high-performance and low-power of multi-core DSPs for general-purpose HPC. SC 2012: 26 - 2011
- [c10]James C. Beyer, Eric J. Stotzer, Alistair Hart, Bronis R. de Supinski:
OpenMP for Accelerators. IWOMP 2011: 108-121
2000 – 2009
- 2009
- [c9]Barbara M. Chapman, Bart Kienhuis, Eduard Ayguadé, François Bodin, Oscar G. Plata, Eric Stotzer:
Introduction. Euro-Par 2009: 837-838 - [c8]Barbara M. Chapman, Lei Huang, Eric Biscondi, Eric Stotzer, Ashish Shrivastava, Alan Gatherer:
Implementing OpenMP on a high performance embedded multicore MPSoC. IPDPS 2009: 1-8 - [c7]Eric Stotzer, Ernst L. Leiss:
Modulo scheduling without overlapped lifetimes. LCTES 2009: 1-10 - [c6]Eric Stotzer, Ernst L. Leiss, Elana D. Granston, David Hoyle:
Prototyping and Programming Tightly Coupled Accelerators. PARCO 2009: 720-727 - 2008
- [c5]Todd T. Hahn, Eric Stotzer, Dineel Sule, Mike Asal:
Compilation Strategies for Reducing Code Size on a VLIW Processor with Variable Length Instructions. HiPEAC 2008: 147-160 - 2002
- [c4]Gayathri Krishnamurthy, Elana D. Granston, Eric Stotzer:
Affinity-based cluster assignment for unrolled loops. ICS 2002: 107-116 - 2001
- [c3]Elana D. Granston, Eric Stotzer, Joe Zbiciak:
Software Pipelining Irregular Loops on the TMS320C6000 VLIW DSP Architecture. LCTES/OM 2001: 138-144 - [c2]Elana D. Granston, Eric Stotzer, Joe Zbiciak:
Software Pipelining Irregular Loops On the TMS320C6000 VLIW DSP Architecture. OM@PLDI 2001: 138-144
1990 – 1999
- 1999
- [c1]Eric Stotzer, Ernst L. Leiss:
Modulo Scheduling for the TMS320C6x VLIW DSP Architecture. Workshop on Languages, Compilers, and Tools for Embedded Systems 1999: 28-34
Coauthor Index
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