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Petar Radojkovic
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2020 – today
- 2024
- [j7]Pouya Esmaili-Dokht, Miquel Guiot, Petar Radojkovic, Xavier Martorell, Eduard Ayguadé, Jesús Labarta, Jason Adlard, Paolo Amato, Marco Sforzin:
$\mathcal{O}(n)$O(n) Key-Value Sort With Active Compute Memory. IEEE Trans. Computers 73(5): 1341-1356 (2024) - [c23]Isaac Boixaderas, Sergi Moré, Javier Bartolome, David Vicente, Petar Radojkovic, Paul M. Carpenter, Eduard Ayguadé:
Reinforcement Learning-based Adaptive Mitigation of Uncorrected DRAM Errors in the Field. HPDC 2024: 240-252 - [i3]Pouya Esmaili-Dokht, Francesco Sgherzi, Valéria Soldera Girelli, Isaac Boixaderas, Mariana Carmin, Alireza Momeni, Adrià Armejach, Estanislao Mercadal, Germán Llort, Petar Radojkovic, Miquel Moretó, Judit Giménez, Xavier Martorell, Eduard Ayguadé, Jesús Labarta, Emanuele Confalonieri, Rishabh Dubey, Jason Adlard:
A Mess of Memory System Benchmarking, Simulation and Application Profiling. CoRR abs/2405.10170 (2024) - [i2]Isaac Boixaderas, Sergi Moré, Javier Bartolome, David Vicente, Petar Radojkovic, Paul M. Carpenter, Eduard Ayguadé:
Reinforcement Learning-based Adaptive Mitigation of Uncorrected DRAM Errors in the Field. CoRR abs/2407.16377 (2024) - [i1]Isaac Boixaderas, Jorge Amaya, Sergi Moré, Javier Bartolome, David Vicente, Osman S. Unsal, Dimitris Gizopoulos, Paul M. Carpenter, Petar Radojkovic, Eduard Ayguadé:
DRAM Errors and Cosmic Rays: Space Invaders or Science Fiction? CoRR abs/2407.16487 (2024) - 2022
- [j6]Kazi Asifuzzaman, Rommel Sánchez Verdejo, Petar Radojkovic:
Performance and Power Estimation of STT-MRAM Main Memory with Reliable System-level Simulation. ACM Trans. Embed. Comput. Syst. 21(1): 6:1-6:25 (2022) - 2020
- [c22]Isaac Boixaderas, Darko Zivanovic, Sergi Moré, Javier Bartolome, David Vicente, Marc Casas, Paul M. Carpenter, Petar Radojkovic, Eduard Ayguadé:
Cost-aware prediction of uncorrected DRAM errors in the field. SC 2020: 61
2010 – 2019
- 2019
- [j5]Milan Radulovic, Rommel Sánchez Verdejo, Paul M. Carpenter, Petar Radojkovic, Bruce L. Jacob, Eduard Ayguadé:
PROFET: Modeling System Performance and Energy Without Simulating the CPU. Proc. ACM Meas. Anal. Comput. Syst. 3(2): 34:1-34:33 (2019) - [c21]Petar Radojkovic:
Towards resilient EU HPC systems: a blueprint. CF 2019: 339 - [c20]Darko Zivanovic, Pouya Esmaili-Dokht, Sergi Moré, Javier Bartolome, Paul M. Carpenter, Petar Radojkovic, Eduard Ayguadé:
DRAM errors in the field: a statistical approach. MEMSYS 2019: 69-84 - [c19]Shang Li, Rommel Sánchez Verdejo, Petar Radojkovic, Bruce L. Jacob:
Rethinking cycle accurate DRAM simulation. MEMSYS 2019: 184-191 - [c18]Kazi Asifuzzaman, Mikel Fernández, Petar Radojkovic, Jaume Abella, Francisco J. Cazorla:
STT-MRAM for real-time embedded systems: performance and WCET implications. MEMSYS 2019: 195-205 - [c17]Milan Radulovic, Rommel Sánchez Verdejo, Paul M. Carpenter, Petar Radojkovic, Bruce L. Jacob, Eduard Ayguadé:
PROFET: Modeling System Performance and Energy Without Simulating the CPU. SIGMETRICS (Abstracts) 2019: 71-72 - 2018
- [c16]Milan Radulovic, Kazi Asifuzzaman, Paul M. Carpenter, Petar Radojkovic, Eduard Ayguadé:
HPC Benchmarking: Scaling Right and Looking Beyond the Average. Euro-Par 2018: 135-146 - [c15]Rommel Sánchez Verdejo, Kazi Asifuzzaman, Milan Radulovic, Petar Radojkovic, Eduard Ayguadé, Bruce L. Jacob:
Main memory latency simulation: the missing link. MEMSYS 2018: 107-116 - [c14]Milan Radulovic, Kazi Asifuzzaman, Darko Zivanovic, Nikola Rajovic, Guillaume Colin de Verdière, Dirk Pleiter, Manolis Marazakis, Nikolaos D. Kallimanis, Paul M. Carpenter, Petar Radojkovic, Eduard Ayguadé:
Mainstream vs. Emerging HPC: Metrics, Trade-Offs and Lessons Learned. SBAC-PAD 2018: 250-257 - 2017
- [j4]Darko Zivanovic, Milan Pavlovic, Milan Radulovic, Hyunsung Shin, Jongpil Son, Sally A. McKee, Paul M. Carpenter, Petar Radojkovic, Eduard Ayguadé:
Main Memory in HPC: Do We Need More or Could We Live with Less? ACM Trans. Archit. Code Optim. 14(1): 3:1-3:26 (2017) - [c13]Alvise Rigo, Christian Pinto, Kevin Pouget, Daniel Raho, Denis Dutoit, Pierre-Yves Martinez, Chris Doran, Luca Benini, Iakovos Mavroidis, Manolis Marazakis, Valeria Bartsch, Guy Lonsdale, Antoniu Pop, John Goodacre, Annaik Colliot, Paul M. Carpenter, Petar Radojkovic, Dirk Pleiter, Dominique Drouin, Benoît Dupont de Dinechin:
Paving the Way Towards a Highly Energy-Efficient and Highly Integrated Compute Node for the Exascale Revolution: The ExaNoDe Approach. DSD 2017: 486-493 - [c12]Rommel Sánchez Verdejo, Petar Radojkovic:
Microbenchmarks for Detailed Validation and Tuning of Hardware Simulators. HPCS 2017: 881-883 - [c11]Kazi Asifuzzaman, Rommel Sánchez Verdejo, Petar Radojkovic:
Enabling a reliable STT-MRAM main memory simulation. MEMSYS 2017: 283-292 - 2016
- [j3]Petar Radojkovic, Paul M. Carpenter, Miquel Moretó, Vladimir Cakarevic, Javier Verdú, Alex Pajuelo, Francisco J. Cazorla, Mario Nemirovsky, Mateo Valero:
Thread Assignment in Multicore/Multithreaded Processors: A Statistical Approach. IEEE Trans. Computers 65(1): 256-269 (2016) - [c10]Darko Zivanovic, Milan Radulovic, Germán Llort, David Zaragoza, Janko Strassburg, Paul M. Carpenter, Petar Radojkovic, Eduard Ayguadé:
Large-Memory Nodes for Energy Efficient High-Performance Computing. MEMSYS 2016: 3-9 - [c9]Kazi Asifuzzaman, Milan Pavlovic, Milan Radulovic, David Zaragoza, Ohseong Kwon, Kyung-Chang Ryoo, Petar Radojkovic:
Performance Impact of a Slower Main Memory: A case study of STT-MRAM in HPC. MEMSYS 2016: 40-49 - 2015
- [c8]Milan Pavlovic, Milan Radulovic, Alex Ramírez, Petar Radojkovic:
Limpio: LIghtweight MPI instrumentatiOn. ICPC 2015: 303-306 - [c7]Milan Radulovic, Darko Zivanovic, Daniel Ruiz, Bronis R. de Supinski, Sally A. McKee, Petar Radojkovic, Eduard Ayguadé:
Another Trip to the Wall: How Much Will Stacked DRAM Benefit HPC? MEMSYS 2015: 31-36 - 2014
- [c6]Ivan Grasso, Petar Radojkovic, Nikola Rajovic, Isaac Gelado, Alex Ramírez:
Energy Efficient HPC on Embedded SoCs: Optimization Techniques for Mali GPU. IPDPS 2014: 123-132 - 2013
- [b1]Petar Radojkovic:
Improving the effective use of multithreaded architectures : implications on compilation, thread assignment, and timing analysis. Polytechnic University of Catalonia, Spain, 2013 - [j2]Petar Radojkovic, Vladimir Cakarevic, Javier Verdú, Alex Pajuelo, Francisco J. Cazorla, Mario Nemirovsky, Mateo Valero:
Thread Assignment of Multithreaded Network Applications in Multicore/Multithreaded Processors. IEEE Trans. Parallel Distributed Syst. 24(12): 2513-2525 (2013) - 2012
- [j1]Petar Radojkovic, Sylvain Girbal, Arnaud Grasset, Eduardo Quiñones, Sami Yehia, Francisco J. Cazorla:
On the evaluation of the impact of shared resources in multithreaded COTS processors in time-critical environments. ACM Trans. Archit. Code Optim. 8(4): 34:1-34:25 (2012) - [c5]Petar Radojkovic, Vladimir Cakarevic, Miquel Moretó, Javier Verdú, Alex Pajuelo, Francisco J. Cazorla, Mario Nemirovsky, Mateo Valero:
Optimal task assignment in multithreaded processors: a statistical approach. ASPLOS 2012: 235-248 - [c4]Petar Radojkovic, Paul M. Carpenter, Miquel Moretó, Alex Ramírez, Francisco J. Cazorla:
Kernel Partitioning of Streaming Applications: A Statistical Approach to an NP-complete Problem. MICRO 2012: 401-412 - 2010
- [c3]Petar Radojkovic, Vladimir Cakarevic, Javier Verdú, Alex Pajuelo, Francisco J. Cazorla, Mario Nemirovsky, Mateo Valero:
Thread to strand binding of parallel network applications in massive multi-threaded systems. PPoPP 2010: 191-202
2000 – 2009
- 2009
- [c2]Vladimir Cakarevic, Petar Radojkovic, Javier Verdú, Alex Pajuelo, Francisco J. Cazorla, Mario Nemirovsky, Mateo Valero:
Characterizing the resource-sharing levels in the UltraSPARC T2 processor. MICRO 2009: 481-492 - 2008
- [c1]Petar Radojkovic, Vladimir Cakarevic, Javier Verdú, Alejandro Pajuelo, Roberto Gioiosa, Francisco J. Cazorla, Mario Nemirovsky, Mateo Valero:
Measuring Operating System Overhead on CMT Processors. SBAC-PAD 2008: 133-140
Coauthor Index
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last updated on 2024-10-07 21:19 CEST by the dblp team
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