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ORCIDMehdi Saeedi
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2020 – today
- 2022
[c21]Ian Colbert, Mehdi Saeedi:
Evaluating Navigation Behavior of Agents in Games using Non-Parametric Statistics. CoG 2022: 544-547- [i15]Ian Colbert, Mehdi Saeedi:
Human-Like Navigation Behavior: A Statistical Evaluation Framework. CoRR abs/2203.05965 (2022) - 2020
- [j14]Mehdi Saeedi
, Boris Ivanovic, Tomasz Stolarczyk, Ihab Amer, Gabor Sines:
Content adaptive pre-filtering for video compression. Signal Image Video Process. 14(5): 935-943 (2020)
2010 – 2019
- 2019
- [c20]Mohamed Hegazy, Khaled M. Diab, Mehdi Saeedi, Boris Ivanovic, Ihab Amer, Yang Liu, Gabor Sines, Mohamed Hefeeda:
Content-aware video encoding for cloud gaming. MMSys 2019: 60-73 - 2018
- [c19]Maryam Jenab, Ihab Amer, Boris Ivanovic, Mehdi Saeedi, Yang Liu, Gabor Sines, Shahram Shirani:
Content-Adaptive Resolution Control To Improve Video Coding Efficiency. ICME Workshops 2018: 1-4 - 2014
- [j13]Alireza Shafaei, Mehdi Saeedi, Massoud Pedram:
Cofactor Sharing for Reversible Logic Synthesis. ACM J. Emerg. Technol. Comput. Syst. 11(2): 14:1-14:21 (2014) - [c18]Alireza Shafaei, Mehdi Saeedi, Massoud Pedram:
Qubit placement to minimize communication overhead in 2D quantum architectures. ASP-DAC 2014: 495-500 - 2013
- [j12]Mehdi Saeedi, Igor L. Markov:
Synthesis and optimization of reversible circuits - a survey. ACM Comput. Surv. 45(2): 21:1-21:34 (2013) - [j11]Afshin Abdollahi, Mehdi Saeedi, Massoud Pedram:
Reversible logic synthesis by quantum rotation gates. Quantum Inf. Comput. 13(9-10): 771-792 (2013) - [j10]Mona Arabzadeh, Morteza Saheb Zamani, Mehdi Sedighi, Mehdi Saeedi:
Depth-optimized reversible circuit synthesis. Quantum Inf. Process. 12(4): 1677-1699 (2013) - [c17]Alireza Shafaei, Mehdi Saeedi, Massoud Pedram:
Optimization of quantum circuits for interaction distance in linear nearest neighbor architectures. DAC 2013: 41:1-41:6 - [c16]Alireza Shafaei, Mehdi Saeedi, Massoud Pedram:
Reversible logic synthesis of k-input, m-output lookup tables. DATE 2013: 1235-1240 - [c15]Mehdi Saeedi, Alireza Shafaei, Massoud Pedram:
Constant-Factor Optimization of Quantum Adders on 2D Quantum Architectures. RC 2013: 58-69 - [i14]Igor L. Markov, Mehdi Saeedi:
Faster Quantum Number Factoring via Circuit Synthesis. CoRR abs/1301.3210 (2013) - [i13]Afshin Abdollahi, Mehdi Saeedi, Massoud Pedram:
Reversible Logic Synthesis by Quantum Rotation Gates. CoRR abs/1302.5382 (2013) - [i12]Mehdi Saeedi, Massoud Pedram:
Linear-Depth Quantum Circuits for n-qubit Toffoli gates with no Ancilla. CoRR abs/1303.3557 (2013) - [i11]Mehdi Saeedi, Alireza Shafaei, Massoud Pedram:
Constant-Factor Optimization of Quantum Adders on 2D Quantum Architectures. CoRR abs/1304.0432 (2013) - [i10]Mehdi Saeedi, Igor L. Markov:
Quantum Circuits for GCD Computation with $O(n \log n)$ Depth and O(n) Ancillae. CoRR abs/1304.7516 (2013) - 2012
- [j9]Igor L. Markov, Mehdi Saeedi:
Constant-optimized quantum circuits for modular multiplication and exponentiation. Quantum Inf. Comput. 12(5-6): 361-394 (2012) - [i9]Igor L. Markov, Mehdi Saeedi:
Constant-Optimized Quantum Circuits for Modular Multiplication and Exponentiation. CoRR abs/1202.6614 (2012) - [i8]Mona Arabzadeh, Morteza Saheb Zamani, Mehdi Sedighi, Mehdi Saeedi:
Depth-Optimized Reversible Circuit Synthesis. CoRR abs/1208.5425 (2012) - 2011
- [j8]Mehdi Saeedi, Mona Arabzadeh, Morteza Saheb Zamani, Mehdi Sedighi:
Block-based quantum-logic synthesis. Quantum Inf. Comput. 11(3&4): 262-277 (2011) - [j7]Mehdi Saeedi, Robert Wille, Rolf Drechsler:
Synthesis of quantum circuits for linear nearest neighbor architectures. Quantum Inf. Process. 10(3): 355-377 (2011) - [j6]Dmitri Maslov, Mehdi Saeedi:
Reversible Circuit Optimization Via Leaving the Boolean Domain. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30(6): 806-816 (2011) - [i7]Dmitri Maslov, Mehdi Saeedi:
Reversible Circuit Optimization via Leaving the Boolean Domain. CoRR abs/1103.0215 (2011) - [i6]Mehdi Saeedi, Igor L. Markov:
Synthesis and Optimization of Reversible Circuits - A Survey. CoRR abs/1110.2574 (2011) - [i5]Mehdi Saeedi, Robert Wille, Rolf Drechsler:
Synthesis of Quantum Circuits for Linear Nearest Neighbor Architectures. CoRR abs/1110.6412 (2011) - 2010
- [j5]Mehdi Saeedi, Morteza Saheb Zamani, Mehdi Sedighi, Zahra Sasanian:
Reversible circuit synthesis using a cycle-based approach. ACM J. Emerg. Technol. Comput. Syst. 6(4): 13:1-13:26 (2010) - [j4]Mehdi Saeedi, Mehdi Sedighi, Morteza Saheb Zamani:
A library-based synthesis methodology for reversible logic. Microelectron. J. 41(4): 185-194 (2010) - [c14]Mona Arabzadeh, Mehdi Saeedi, Morteza Saheb Zamani:
Rule-based optimization of reversible circuits. ASP-DAC 2010: 849-854 - [i4]Mehdi Saeedi, Mehdi Sedighi, Morteza Saheb Zamani:
A Library-Based Synthesis Methodology for Reversible Logic. CoRR abs/1004.1697 (2010) - [i3]Mona Arabzadeh, Mehdi Saeedi, Morteza Saheb Zamani:
Rule-Based Optimization of Reversible Circuits. CoRR abs/1004.1755 (2010) - [i2]Mehdi Saeedi, Morteza Saheb Zamani, Mehdi Sedighi, Zahra Sasanian:
Reversible Circuit Synthesis Using a Cycle-Based Approach. CoRR abs/1004.4320 (2010) - [i1]Mehdi Saeedi, Mona Arabzadeh, Morteza Saheb Zamani, Mehdi Sedighi:
Block-based quantum-logic synthesis. CoRR abs/1011.2159 (2010)
2000 – 2009
- 2009
- [c13]Zahra Sasanian, Mehdi Saeedi, Mehdi Sedighi, Morteza Saheb Zamani:
A cycle-based synthesis algorithm for reversible logic. ASP-DAC 2009: 745-750 - 2008
- [j3]Mehdi Saeedi, Mehdi Sedighi, Morteza Saheb Zamani:
Synthesis of reversible circuits using a moving forward strategy. IEICE Electron. Express 5(17): 638-643 (2008) - [j2]Hamid Fadishei, Mehdi Saeedi, Morteza Saheb Zamani:
A fast IP routing lookup architecture for multi-gigabit switching routers based on reconfigurable systems. Microprocess. Microsystems 32(4): 223-233 (2008) - [c12]Mehdi Saeedi, Morteza Saheb Zamani, Mehdi Sedighi:
Moving forward: A non-search based synthesis method toward efficient CNOT-based quantum circuit synthesis algorithms. ASP-DAC 2008: 83-88 - [c11]Minoo Mirsaeedi, Morteza Saheb Zamani, Mehdi Saeedi:
Multi-Objective Statistical Yield Enhancement using Evolutionary Algorithm. DSD 2008: 472-479 - [c10]Mehdi Saeedi, Naser MohammadZadeh, Mehdi Sedighi, Morteza Saheb Zamani:
Evaluation and Improvement of Quantum Synthesis Algorithms based on a Thorough Set of Metrics. DSD 2008: 490-493 - [c9]Morteza Saheb Zamani, Maryam Taajobian, Mehdi Saeedi:
An Efficient Non-Tree Clock Routing Algorithm for Reducing Delay Uncertainty. DSD 2008: 558-565 - [c8]Mahdi Aminian, Mehdi Saeedi, Morteza Saheb Zamani, Mehdi Sedighi:
FPGA-Based Circuit Model Emulation of Quantum Algorithms. ISVLSI 2008: 399-404 - [c7]Minoo Mirsaeedi, Morteza Saheb Zamani, Mehdi Saeedi:
Simultaneous Gate Sizing and Skew Scheduling to Statistical Yield Improvement. ISVLSI 2008: 467-470 - [c6]Yasaman Sanaee, Mehdi Saeedi, Morteza Saheb Zamani:
Shared-PPRM: A Memory-Efficient Representation for Boolean Reversible Functions. ISVLSI 2008: 471-474 - 2007
- [j1]Mehdi Saeedi, Morteza Saheb Zamani, Ali Jahanian:
Evaluation, prediction and reduction of routing congestion. Microelectron. J. 38(8-9): 942-958 (2007) - [c5]Mehdi Saeedi, Morteza Saheb Zamani, Mehdi Sedighi:
Algebraic Characterization of CNOT-Based Quantum Circuits with its Applications on Logic Synthesis. DSD 2007: 339-346 - [c4]Mehdi Saeedi, Mehdi Sedighi, Morteza Saheb Zamani:
A novel synthesis algorithm for reversible circuits. ICCAD 2007: 65-68 - [c3]Hamid Reza Kheirabadi, Morteza Saheb Zamani, Mehdi Saeedi:
An Efficient Analytical Approach to Path-Based Buffer Insertion. ISVLSI 2007: 219-224 - [c2]Mehdi Saeedi, Morteza Saheb Zamani, Mehdi Sedighi:
On the Behavior of Substitution-based Reversible Circuit Synthesis Algorithms: Investigation and Improvement. ISVLSI 2007: 428-436 - 2006
- [c1]Mehdi Saeedi, Morteza Saheb Zamani, Ali Jahanian:
Prediction and reduction of routing congestion. ISPD 2006: 72-77
Coauthor Index
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