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2020 – today
- 2024
[j20]Haisheng Fu
, Feng Liang, Jie Liang, Yongqiang Wang, Zhenman Fang, Guohe Zhang, Jingning Han:
Fast and High-Performance Learned Image Compression With Improved Checkerboard Context Model, Deformable Residual Module, and Knowledge Distillation. IEEE Trans. Image Process. 33: 4702-4715 (2024)- [j19]Geng Yang, Jie Lei, Zhenman Fang, Yunsong Li, Jiaqing Zhang, Weiying Xie:
HyBNN: Quantifying and Optimizing Hardware Efficiency of Binary Neural Networks. ACM Trans. Reconfigurable Technol. Syst. 17(2): 25:1-25:24 (2024) - [j18]Alec Lu, Jahanvi Narendra Agrawal, Zhenman Fang:
SQL2FPGA: Automated Acceleration of SQL Query Processing on Modern CPU-FPGA Platforms. ACM Trans. Reconfigurable Technol. Syst. 17(3): 39:1-39:28 (2024) - [j17]Moazin Khatti, Xingyu Tian, Ahmad Sedigh Baroughi, Akhil Raj Baranwal, Yuze Chi, Licheng Guo, Jason Cong, Zhenman Fang:
PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs. ACM Trans. Reconfigurable Technol. Syst. 17(3): 42:1-42:31 (2024) - [c64]Haisheng Fu, Feng Liang, Jie Liang, Zhenman Fang, Guohe Zhang, Jingning Han:
Learned Image Compression with Dual-Branch Encoder and Conditional Information Coding. DCC 2024: 173-182 - [c63]Haisheng Fu, Jie Liang, Zhenman Fang, Jingning Han, Feng Liang, Guohe Zhang:
WeConvene: Learned Image Compression with Wavelet-Domain Convolution and Entropy Model. ECCV (50) 2024: 37-53 - [c62]Manoj B. Rajashekar, Xingyu Tian, Zhenman Fang:
HiSpMV: Hybrid Row Distribution and Vector Buffering for Imbalanced SpMV Acceleration on FPGAs. FPGA 2024: 154-164 - [c61]Geng Yang, Jie Lei, Zhenman Fang, Jiaqing Zhang, Junrong Zhang, Weiying Xie, Yunsong Li:
E4SA: An Ultra-Efficient Systolic Array Architecture for 4-Bit Convolutional Neural Networks. FPGA 2024: 183 - [c60]Philip Stachura, Guanyu Li, Xin Wu, Christian Plessl, Zhenman Fang:
SERI: High-Throughput Streaming Acceleration of Electron Repulsion Integral Computation in Quantum Chemistry using HBM-based FPGAs. FPL 2024: 60-68 - [c59]Geng Yang, Jie Lei, Zhenman Fang, Jiaqing Zhang, Junrong Zhang, Weiying Xie, Yunsong Li:
SA4: A Comprehensive Analysis and Optimization of Systolic Array Architecture for 4-bit Convolutions. FPL 2024: 204-212 - [c58]Geng Yang, Yanyue Xie, Zhong Jia Xue, Sung-En Chang, Yanyu Li, Peiyan Dong, Jie Lei, Weiying Xie, Yanzhi Wang, Xue Lin, Zhenman Fang:
SDA: Low-Bit Stable Diffusion Acceleration on Edge FPGAs. FPL 2024: 264-273 - [c57]Abdul Wadood, Alec Lu, Ken Zhang, Zhenman Fang:
FORC: A High-Throughput Streaming FPGA Accelerator for Optimized Row Columnar File Decoders in Big Data Engines. FPL 2024: 318-324 - [c56]Kenneth Liu, Alec Lu, Zhenman Fang:
BitBlender: Scalable Bloom Filter Acceleration on FPGAs with Dynamic Scheduling. FPL 2024: 325-331 - [c55]Haisheng Fu, Feng Liang, Jie Liang, Zhenman Fang, Guohe Zhang, Jingning Han:
Efficient Learned Image Compression with Selective Kernel Residual Module and Channel-Wise Causal Context Model. ICASSP 2024: 4040-4044 - [c54]Zhengang Li, Alec Lu, Yanyue Xie, Zhenglun Kong, Mengshu Sun, Hao Tang, Zhong Jia Xue, Peiyan Dong, Caiwen Ding, Yanzhi Wang, Xue Lin, Zhenman Fang:
Quasar-ViT: Hardware-Oriented Quantization-Aware Architecture Search for Vision Transformers. ICS 2024: 324-337 - [c53]Jürgen Becker, Zhenman Fang, Viktor K. Prasanna, Marco D. Santambrogio, Ramachandran Vaidyanathan:
31st Reconfigurable Architectures Workshop (RAW 2024). IPDPS (Workshops) 2024: 79 - [c52]Junzhe Liang, Manoj B. Rajashekar, Xingyu Tian, Zhenman Fang:
HiTC: High-Performance Triangle Counting on HBM-Equipped FPGAs Using HLS. PACRIM 2024: 1-6 - [i15]Zhengang Li, Alec Lu, Yanyue Xie, Zhenglun Kong, Mengshu Sun, Hao Tang, Zhong Jia Xue, Peiyan Dong, Caiwen Ding, Yanzhi Wang, Xue Lin, Zhenman Fang:
Quasar-ViT: Hardware-Oriented Quantization-Aware Architecture Search for Vision Transformers. CoRR abs/2407.18175 (2024) - 2023
- [j16]Weikang Qiao, Licheng Guo, Zhenman Fang, Mau-Chung Frank Chang, Jason Cong:
TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-Based FPGAs. IEEE Trans. Emerg. Top. Comput. 11(2): 404-419 (2023) - [j15]Jiaqing Zhang, Jie Lei, Weiying Xie, Zhenman Fang, Yunsong Li, Qian Du:
SuperYOLO: Super Resolution Assisted Object Detection in Multimodal Remote Sensing Imagery. IEEE Trans. Geosci. Remote. Sens. 61: 1-15 (2023) - [j14]Xingyu Tian, Zhifan Ye, Alec Lu, Licheng Guo, Yuze Chi, Zhenman Fang:
SASA: A Scalable and Automatic Stencil Acceleration Framework for Optimized Hybrid Spatial and Temporal Parallelism on HBM-based FPGAs. ACM Trans. Reconfigurable Technol. Syst. 16(2): 28:1-28:33 (2023) - [j13]Kenneth Liu, Alec Lu, Kartik Samtani, Zhenman Fang, Licheng Guo:
CHIP-KNNv2: A Configurable and High-Performance K-Nearest Neighbors Accelerator on HBM-based FPGAs. ACM Trans. Reconfigurable Technol. Syst. 16(4): 62:1-62:26 (2023) - [j12]Licheng Guo, Yuze Chi, Jason Lau, Linghao Song, Xingyu Tian, Moazin Khatti, Weikang Qiao, Jie Wang, Ecenur Ustun, Zhenman Fang, Zhiru Zhang, Jason Cong:
TAPA: A Scalable Task-parallel Dataflow Programming Framework for Modern FPGAs with Co-optimization of HLS and Physical Design. ACM Trans. Reconfigurable Technol. Syst. 16(4): 63:1-63:31 (2023) - [c51]Chen Zhang, Guangyu Sun, Zhenman Fang, Peipei Zhou, Jason Cong:
Caffeine: Towards Uniformed Representation and Acceleration for Deep Convolutional Neural Networks. ACM TUR-C 2023: 47-48 - [c50]Sung-En Chang, Geng Yuan, Alec Lu, Mengshu Sun, Yanyu Li, Xiaolong Ma, Zhengang Li, Yanyue Xie, Minghai Qin, Xue Lin, Zhenman Fang, Yanzhi Wang:
ESRU: Extremely Low-Bit and Hardware-Efficient Stochastic Rounding Unit Design for Low-Bit DNN Training. DATE 2023: 1-6 - [c49]Moazin Khatti, Xingyu Tian, Yuze Chi, Licheng Guo, Jason Cong, Zhenman Fang:
PASTA: Programming and Automation Support for Scalable Task-Parallel HLS Programs on Modern Multi-Die FPGAs. FCCM 2023: 12-22 - [c48]Alec Lu, Zhenman Fang:
SQL2FPGA: Automatic Acceleration of SQL Query Processing on Modern CPU-FPGA Platforms. FCCM 2023: 184-194 - [c47]Geng Yang, Jie Lei, Zhenman Fang, Yunsong Li, Jiaqing Zhang, Weiying Xie:
HyBNN: Quantifying and Optimizing Hardware Efficiency of Binary Neural Networks. FCCM 2023: 203 - [c46]Geng Yang, Jie Lei, Zhenman Fang, Yunsong Li, Jiaqing Zhang, Weiying Xie:
Journal Track Paper ICFPT 2023 : HyBNN: Quantifying and Optimizing Hardware Efficiency of Binary Neural Networks. ICFPT 2023: 3-4 - [c45]Peiyan Dong, Mengshu Sun, Alec Lu, Yanyue Xie, Kenneth Liu, Zhenglun Kong, Xin Meng, Zhengang Li, Xue Lin, Zhenman Fang, Yanzhi Wang:
HeatViT: Hardware-Efficient Adaptive Token Pruning for Vision Transformers. HPCA 2023: 442-455 - [i14]Eduardo Rhod, Behnam Ghavami, Zhenman Fang, Lesley Shannon:
A Cycle-Accurate Soft Error Vulnerability Analysis Framework for FPGA-based Designs. CoRR abs/2303.12269 (2023) - 2022
- [j11]Geng Yang, Jie Lei, Weiying Xie, Zhenman Fang, Yunsong Li, Jiaxuan Wang, Xin Zhang:
Algorithm/Hardware Codesign for Real-Time On-Satellite CNN-Based Ship Detection in SAR Imagery. IEEE Trans. Geosci. Remote. Sens. 60: 1-18 (2022) - [j10]Christian Pilato, Zhenman Fang, Yuko Hara-Azumi, Jim Hwang:
Introduction to the Special Section on High-level Synthesis for FPGA: Next-generation Technologies and Applications. ACM Trans. Design Autom. Electr. Syst. 27(4): 29:1-29:2 (2022) - [j9]Eric Matthews, Alec Lu, Zhenman Fang, Lesley Shannon:
Quick-Div: Rethinking Integer Divider Design for FPGA-based Soft-processors. ACM Trans. Reconfigurable Technol. Syst. 15(3): 32:1-32:27 (2022) - [j8]Alec Lu, Zhenman Fang, Lesley Shannon:
Demystifying the Soft and Hardened Memory Systems of Modern FPGAs for Software Programmers through Microbenchmarking. ACM Trans. Reconfigurable Technol. Syst. 15(4): 43:1-43:33 (2022) - [j7]Sathish Panchapakesan, Zhenman Fang, Jian Li:
SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs. ACM Trans. Reconfigurable Technol. Syst. 15(4): 48:1-48:27 (2022) - [c44]Mengshu Sun, Zhengang Li, Alec Lu, Haoyu Ma, Geng Yuan, Yanyue Xie, Hao Tang, Yanyu Li, Miriam Leeser, Zhangyang Wang, Xue Lin, Zhenman Fang:
FPGA-aware automatic acceleration framework for vision transformer with mixed-scheme quantization: late breaking results. DAC 2022: 1394-1395 - [c43]Sung-En Chang, Geng Yuan, Alec Lu, Mengshu Sun, Yanyu Li, Xiaolong Ma, Zhengang Li, Yanyue Xie, Minghai Qin, Xue Lin, Zhenman Fang, Yanzhi Wang:
Hardware-efficient stochastic rounding unit design for DNN training: late breaking results. DAC 2022: 1396-1397 - [c42]Behnam Ghavami, Mani Sadati, Zhenman Fang, Lesley Shannon:
FitAct: Error Resilient Deep Neural Networks via Fine-Grained Post-Trainable Activation Functions. DATE 2022: 1239-1244 - [c41]Behnam Ghavami, Mahdi Sajedi, Mohsen Raji, Zhenman Fang, Lesley Shannon:
A Majority-based Approximate Adder for FPGAs. DSD 2022: 53-59 - [c40]Behnam Ghavami, Mani Sadati, Mohammad Shahidzadeh, Zhenman Fang, Lesley Shannon:
Blind Data Adversarial Bit-flip Attack against Deep Neural Networks. DSD 2022: 899-904 - [c39]Geng Yuan, Sung-En Chang, Qing Jin, Alec Lu, Yanyu Li, Yushu Wu, Zhenglun Kong, Yanyue Xie, Peiyan Dong, Minghai Qin, Xiaolong Ma, Xulong Tang, Zhenman Fang, Yanzhi Wang:
You Already Have It: A Generator-Free Low-Precision DNN Training Framework Using Stochastic Rounding. ECCV (12) 2022: 34-51 - [c38]Weikang Qiao, Licheng Guo, Zhenman Fang, Mau-Chung Frank Chang, Jason Cong:
TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-based FPGAs. FCCM 2022: 1 - [c37]Mengshu Sun, Zhengang Li, Alec Lu, Yanyu Li, Sung-En Chang, Xiaolong Ma, Xue Lin, Zhenman Fang:
FILM-QNN: Efficient FPGA Acceleration of Deep Neural Networks with Intra-Layer, Mixed-Precision Quantization. FPGA 2022: 134-145 - [c36]Zhengang Li, Mengshu Sun, Alec Lu, Haoyu Ma, Geng Yuan, Yanyue Xie, Hao Tang, Yanyu Li, Miriam Leeser, Zhangyang Wang, Xue Lin, Zhenman Fang:
Auto-ViT-Acc: An FPGA-Aware Automatic Acceleration Framework for Vision Transformer with Mixed-Scheme Quantization. FPL 2022: 109-116 - [c35]Behnam Ghavami, Seyd Movi, Zhenman Fang, Lesley Shannon:
Stealthy Attack on Algorithmic-Protected DNNs via Smart Bit Flipping. ISQED 2022: 1-7 - [i13]Weikang Qiao, Licheng Guo, Zhenman Fang, Mau-Chung Frank Chang, Jason Cong:
TopSort: A High-Performance Two-Phase Sorting Accelerator Optimized on HBM-based FPGAs. CoRR abs/2205.07991 (2022) - [i12]Zhengang Li, Mengshu Sun, Alec Lu, Haoyu Ma, Geng Yuan, Yanyue Xie, Hao Tang, Yanyu Li, Miriam Leeser, Zhangyang Wang, Xue Lin, Zhenman Fang:
Auto-ViT-Acc: An FPGA-Aware Automatic Acceleration Framework for Vision Transformer with Mixed-Scheme Quantization. CoRR abs/2208.05163 (2022) - [i11]Xingyu Tian, Zhifan Ye, Alec Lu, Licheng Guo, Yuze Chi, Zhenman Fang:
SASA: A Scalable and Automatic Stencil Acceleration Framework for Optimized Hybrid Spatial and Temporal Parallelism on HBM-based FPGAs. CoRR abs/2208.10770 (2022) - [i10]Licheng Guo, Yuze Chi, Jason Lau, Linghao Song, Xingyu Tian, Moazin Khatti, Weikang Qiao, Jie Wang, Ecenur Ustun, Zhenman Fang, Zhiru Zhang, Jason Cong:
TAPA: A Scalable Task-Parallel Dataflow Programming Framework for Modern FPGAs with Co-Optimization of HLS and Physical Design. CoRR abs/2209.02663 (2022) - [i9]Jiaqing Zhang, Jie Lei, Weiying Xie, Zhenman Fang, Yunsong Li, Qian Du:
SuperYOLO: Super Resolution Assisted Object Detection in Multimodal Remote Sensing Imagery. CoRR abs/2209.13351 (2022) - [i8]Peiyan Dong, Mengshu Sun, Alec Lu, Yanyue Xie, Kenneth Liu, Zhenglun Kong, Xin Meng, Zhengang Li, Xue Lin, Zhenman Fang, Yanzhi Wang:
HeatViT: Hardware-Efficient Adaptive Token Pruning for Vision Transformers. CoRR abs/2211.08110 (2022) - 2021
- [j6]Yi-Hsiang Lai, Ecenur Ustun, Shaojie Xiang, Zhenman Fang, Hongbo Rong, Zhiru Zhang:
Programming and Synthesis for Software-defined FPGA Acceleration: Status and Future Prospects. ACM Trans. Reconfigurable Technol. Syst. 14(4): 17:1-17:39 (2021) - [c34]Alec Lu, Zhenman Fang, Weihua Liu, Lesley Shannon:
Demystifying the Memory System of Modern Datacenter FPGAs for Software Programmers through Microbenchmarking. FPGA 2021: 105-115 - [c33]Behnam Ghavami, Seyed Milad Ebrahimi, Zhenman Fang, Lesley Shannon:
LEAP: A Deep Learning based Aging-Aware Architecture Exploration Framework for FPGAs. FPGA 2021: 146 - [c32]Sathish Panchapakesan, Zhenman Fang, Jian Li:
SyncNN: Evaluating and Accelerating Spiking Neural Networks on FPGAs. FPL 2021: 286-293 - [c31]Behnam Ghavami, Milad Ibrahimipour, Zhenman Fang, Lesley Shannon:
MAPLE: A Machine Learning based Aging-Aware FPGA Architecture Exploration Framework. FPL 2021: 369-373 - [i7]Behnam Ghavami, Mani Sadati, Mohammad Shahidzadeh, Zhenman Fang, Lesley Shannon:
BDFA: A Blind Data Adversarial Bit-flip Attack on Deep Neural Networks. CoRR abs/2112.03477 (2021) - [i6]Kiarash Saremi, Hossein Pedram, Behnam Ghavami, Mohsen Raji, Zhenman Fang, Lesley Shannon:
SeaPlace: Process Variation Aware Placement for Reliable Combinational Circuits against SETs and METs. CoRR abs/2112.04136 (2021) - [i5]Behnam Ghavami, Seyd Movi, Zhenman Fang, Lesley Shannon:
Stealthy Attack on Algorithmic-Protected DNNs via Smart Bit Flipping. CoRR abs/2112.13162 (2021) - [i4]Behnam Ghavami, Mani Sadati, Zhenman Fang, Lesley Shannon:
FitAct: Error Resilient Deep Neural Networks via Fine-Grained Post-Trainable Activation Functions. CoRR abs/2112.13544 (2021) - 2020
- [c30]Michael Lo, Zhenman Fang, Jie Wang, Peipei Zhou, Mau-Chung Frank Chang, Jason Cong:
Algorithm-Hardware Co-design for BQSR Acceleration in Genome Analysis ToolKit. FCCM 2020: 157-166 - [c29]Sathish Panchapakesan, Zhenman Fang, Nitin Chandrachoodan:
EASpiNN: Effective Automated Spiking Neural Network Evaluation on FPGA. FCCM 2020: 242 - [c28]Seyed Milad Ebrahimipour, Behnam Ghavami, Hamid Mousavi, Mohsen Raji, Zhenman Fang, Lesley Shannon:
Aadam: A Fast, Accurate, and Versatile Aging-Aware Cell Library Delay Model using Feed-Forward Neural Network. ICCAD 2020: 31:1-31:9 - [c27]Alec Lu, Zhenman Fang, Nazanin Farahpour, Lesley Shannon:
CHIP-KNN: A Configurable and High-Performance K-Nearest Neighbors Accelerator on Cloud FPGAs. FPT 2020: 139-147 - [c26]Nazanin Farahpour, Yuchen Hao, Zhenman Fang, Glenn Reinman:
Reconfigurable Accelerator Compute Hierarchy: A Case Study using Content-Based Image Retrieval. IISWC 2020: 276-287 - [c25]Nazanin Farahpour, Zhenman Fang, Glenn Reinman:
FPGA-based Near Data Processing Platform Selection Using Fast Performance Modeling (WiP Paper). LCTES 2020: 151-155
2010 – 2019
- 2019
- [j5]Jason Cong, Zhenman Fang, Muhuan Huang, Peng Wei, Di Wu, Cody Hao Yu:
Customizable Computing - From Single Chip to Datacenters. Proc. IEEE 107(1): 185-203 (2019) - [j4]Chen Zhang, Guangyu Sun, Zhenman Fang, Peipei Zhou, Peichen Pan, Jason Cong:
Caffeine: Toward Uniformed Representation and Acceleration for Deep Convolutional Neural Networks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(11): 2072-2085 (2019) - [j3]Young-kyu Choi, Jason Cong, Zhenman Fang, Yuchen Hao, Glenn Reinman, Peng Wei:
In-Depth Analysis on Microarchitectures of Modern Heterogeneous CPU-FPGA Platforms. ACM Trans. Reconfigurable Technol. Syst. 12(1): 4:1-4:20 (2019) - [c24]Zhenman Fang, Farnoosh Javadi, Jason Cong, Glenn Reinman:
Understanding Performance Gains of Accelerator-Rich Architectures. ASAP 2019: 239-246 - [c23]Weikang Qiao, Zhenman Fang, Mau-Chung Frank Chang, Jason Cong:
An FPGA-Based BWT Accelerator for Bzip2 Data Compression. FCCM 2019: 96-99 - [c22]Eric Matthews, Alec Lu, Zhenman Fang, Lesley Shannon:
Rethinking Integer Divider Design for FPGA-Based Soft-Processors. FCCM 2019: 289-297 - 2018
- [j2]Jason Cong, Zhenman Fang, Muhuan Huang, Libo Wang, Di Wu:
CPU-FPGA Coscheduling for Big Data Applications. IEEE Des. Test 35(1): 16-22 (2018) - [c21]Weikang Qiao, Jieqiong Du, Zhenman Fang, Michael Lo, Mau-Chung Frank Chang, Jason Cong:
High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms. FCCM 2018: 37-44 - [c20]Jason Cong, Zhenman Fang, Michael Lo, Hanrui Wang, Jingxian Xu, Shaochong Zhang:
Understanding Performance Differences of FPGAs and GPUs. FCCM 2018: 93-96 - [c19]Jason Cong, Zhenman Fang, Yao Hu, Di Wu:
K-Flow: A Programming and Scheduling Framework to Optimize Dataflow Execution on CPU-FPGA Platforms: (Abstract Only). FPGA 2018: 287 - [c18]Jason Cong, Zhenman Fang, Michael Lo, Hanrui Wang, Jingxian Xu, Shaochong Zhang:
Understanding Performance Differences of FPGAs and GPUs: (Abtract Only). FPGA 2018: 288 - [c17]Weikang Qiao, Jieqiong Du, Zhenman Fang, Libo Wang, Michael Lo, Mau-Chung Frank Chang, Jason Cong:
High-Throughput Lossless Compression on Tightly Coupled CPU-FPGA Platforms: (Abstract Only). FPGA 2018: 291 - [c16]Peipei Zhou, Zhenyuan Ruan, Zhenman Fang, Megan Shand, David Roazen, Jason Cong:
Doppio: I/O-Aware Performance Analysis, Modeling and Optimization for In-memory Computing Framework. ISPASS 2018: 22-32 - [i3]Jason Cong, Zhenman Fang, Yuchen Hao, Peng Wei, Cody Hao Yu, Chen Zhang, Peipei Zhou:
Best-Effort FPGA Programming: A Few Steps Can Go a Long Way. CoRR abs/1807.01340 (2018) - 2017
- [c15]Jason Cong, Zhenman Fang, Muhuan Huang, Libo Wang, Di Wu:
CPU-FPGA Co-Optimization for Big Data Applications: A Case Study of In-Memory Samtool Sorting (Abstract Only). FPGA 2017: 291 - [c14]Yuchen Hao, Zhenman Fang, Glenn Reinman, Jason Cong:
Supporting Address Translation for Accelerator-Centric Architectures. HPCA 2017: 37-48 - [c13]Jason Cong, Zhenman Fang, Michael Gill, Farnoosh Javadi, Glenn Reinman:
AIM: accelerating computational genomics through scalable and noninvasive accelerator-interposed memory. MEMSYS 2017: 3-14 - 2016
- [c12]Muhuan Huang, Di Wu, Cody Hao Yu, Zhenman Fang, Matteo Interlandi, Tyson Condie, Jason Cong:
Programming and Runtime Support to Blaze FPGA Accelerator Deployment at Datacenter Scale. SoCC 2016: 456-469 - [c11]Young-kyu Choi, Jason Cong, Zhenman Fang, Yuchen Hao, Glenn Reinman, Peng Wei:
A quantitative analysis on microarchitectures of modern CPU-FPGA platforms. DAC 2016: 109:1-109:6 - [c10]Yu-Ting Chen, Jason Cong, Zhenman Fang, Jie Lei, Peng Wei:
When Spark Meets FPGAs: A Case Study for Next-Generation DNA Sequencing Acceleration. FCCM 2016: 29 - [c9]Peipei Zhou, Hyunseok Park, Zhenman Fang, Jason Cong, André DeHon:
Energy Efficiency of Full Pipelining: A Case Study for Matrix Multiplication. FCCM 2016: 172-175 - [c8]Yu-Ting Chen, Jason Cong, Zhenman Fang, Peipei Zhou:
ARAPrototyper: Enabling Rapid Prototyping and Evaluation for Accelerator-Rich Architecture (Abstact Only). FPGA 2016: 281 - [c7]Yu-Ting Chen, Jason Cong, Zhenman Fang, Jie Lei, Peng Wei:
When Spark Meets FPGAs: A Case Study for Next-Generation DNA Sequencing Acceleration. HotCloud 2016 - [c6]Chen Zhang, Zhenman Fang, Peipei Zhou, Peichen Pan, Jason Cong:
Caffeine: towards uniformed representation and acceleration for deep convolutional neural networks. ICCAD 2016: 12:1-12:8 - [i2]Yu-Ting Chen, Jason Cong, Zhenman Fang, Bingjun Xiao, Peipei Zhou:
ARAPrototyper: Enabling Rapid Prototyping and Evaluation for Accelerator-Rich Architectures. CoRR abs/1610.09761 (2016) - [i1]Jason Cong, Zhenman Fang, Hassan Kianinejad, Peng Wei:
Revisiting FPGA Acceleration of Molecular Dynamics Simulation with Dynamic Data Flow Behavior in High-Level Synthesis. CoRR abs/1611.04474 (2016) - 2015
- [c5]Jason Cong, Zhenman Fang, Michael Gill, Glenn Reinman:
PARADE: A Cycle-Accurate Full-System Simulation Platform for Accelerator-Rich Architectural Design and Exploration. ICCAD 2015: 380-387 - 2014
- [j1]Zhenman Fang, Sanyam Mehta, Pen-Chung Yew, Antonia Zhai, James B. S. G. Greensky, Gautham Beeraka, Binyu Zang:
Measuring Microarchitectural Details of Multi- and Many-Core Memory Systems through Microbenchmarking. ACM Trans. Archit. Code Optim. 11(4): 55:1-55:26 (2014) - [c4]Sanyam Mehta, Zhenman Fang, Antonia Zhai, Pen-Chung Yew:
Multi-stage coordinated prefetching for present-day processors. ICS 2014: 73-82 - 2012
- [c3]Zhenman Fang, Qinghao Min, Keyong Zhou, Yi Lu, Yibin Hu, Weihua Zhang, Haibo Chen, Jian Li, Binyu Zang:
Transformer: a functional-driven cycle-accurate multicore simulator. DAC 2012: 106-114 - [c2]Zhenman Fang, Jiaxin Li, Weihua Zhang, Yi Li, Haibo Chen, Binyu Zang:
Improving dynamic prediction accuracy through multi-level phase analysis. LCTES 2012: 89-98 - 2011
- [c1]Zhenman Fang, Donglei Yang, Weihua Zhang, Haibo Chen, Binyu Zang:
A comprehensive analysis and parallelization of an image retrieval algorithm. ISPASS 2011: 154-164
Coauthor Index
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