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Nobuaki Kawato
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1990 – 1999
- 1996
- [j3]Hiroshi Ishikawa, Yasuo Yamane, Yoshio Izumida, Nobuaki Kawato:
An Object-Oriented Database System Jasmine: Implementation, Application, and Extension. IEEE Trans. Knowl. Data Eng. 8(2): 285-304 (1996) - 1992
- [c13]Yoriko Minoda, Shuho Sawada, Yuka Takizawa, Fumihiro Maruyama, Nobuaki Kawato:
A Cooperative Logic Design Expert System on a Multiprocessor. FGCS 1992: 1181-1189 - [c12]Hiroshi Ishikawa, Yoshio Izumida, Nobuaki Kawato, Tatsuya Hayashi:
An Object-Oriented Database System and its View Mechanism for Schema Integration. Future Databases 1992: 194-200 - 1990
- [j2]Fumiyasu Hirose, Koichiro Takayama, Nobuaki Kawato:
A high-speed test-generation method using a test generation circuit. Syst. Comput. Jpn. 21(11): 12-20 (1990)
1980 – 1989
- 1988
- [c11]Minoru Saitoh, Kenji Iwata, Akiko Nokamura, Makoto Kakegawa, Junichi Masuda, Hirofumi Hamamura, Fumiyasu Hirose, Nobuaki Kawato:
Logic Simulation System Using Simulation Processor (SP). DAC 1988: 225-230 - [c10]Fumihiro Maruyama, Taeko Kakuda, Yusuke Matsunaga, Yoriko Minoda, Shuho Sawada, Nobuaki Kawato:
co-LODEX: A Cooperative Expert System for Logic design. FGCS 1988: 1299-1306 - [c9]Masahiro Fujita, Hisanori Fujisawa, Nobuaki Kawato:
Evaluation and improvement of Boolean comparison method based on binary decision diagrams. ICCAD 1988: 2-5 - [c8]Fumiyasu Hirose, Koichiro Takayama, Nobuaki Kawato:
A Method to Generate Tests for Combinational Logic Circuits Using an Ultra-High-Speed Logic Simulator. ITC 1988: 102-107 - 1986
- [c7]Takao Saito, Hiroyuki Sugimoto, Masami Yamazaki, Nobuaki Kawato:
A rule-based logic circuit synthesis system for CMOS gate arrays. DAC 1986: 594-600 - [c6]Tamio Mano, Fumihiro Maruyama, Kazushi Hayashi, Taeko Kakuda, Nobuaki Kawato, Takao Uehara:
Knowledge-Based Expert System for Hardware Logic Design. FJCC 1986: 979-986 - 1984
- [c5]Fumihiro Maruyama, Tamio Mano, Kazushi Hayashi, Taeko Kakuda, Nobuaki Kawato, Takao Uehara:
Prolog-Based Expert System for Logic Design. FGCS 1984: 563-571 - 1983
- [j1]Takao Uehara, Nobuaki Kawato:
Logic Circuit Synthesis Using Prolog. New Gener. Comput. 1(2): 187-193 (1983) - 1982
- [c4]Fumihiro Maruyama, Takao Uehara, Nobuaki Kawato, Takao Saito:
A verification technique for hardware designs. DAC 1982: 832-841 - [c3]Nobuaki Kawato, Takao Uehara, Sadaki Hirose, Takao Saito:
An interactive logic synthesis system based upon AI techniques. DAC 1982: 858-864 - 1981
- [c2]Takao Saito, Takao Uehara, Nobuaki Kawato:
A CAD system for logic design based on frames and demons. DAC 1981: 451-456
1970 – 1979
- 1979
- [c1]Nobuaki Kawato, Takao Saito, Fumihiro Maruyama, Takao Uehara:
Design and verification of large-scale computers by using DDL. DAC 1979: 360-366
Coauthor Index
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