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Philippe Coppejans
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2020 – today
- 2024
- [c5]Xiaolin Yang, Joan Aymerich, Philippe Coppejans, Wen-Yang Hsu, Chutham Sawigun, Jose Cisneros-Fernández, Andrea Lodi, Maribel Caceres Rivera, Bernardo Tacca, Matt McDonald, Hasan Mahmud-UI, Barundeb Dutta, Jan Putzeys, Carolina Mora Lopez:
A Highly-Integrated 1536-Channel Quad-Shank Monolithic Neural Probe in 55nm CMOS for Full-Band Raw-Signal Recording. VLSI Technology and Circuits 2024: 1-2 - 2023
- [c4]Wen-Yang Hsu, Joan Aymerich, Xiaolin Yang, Chutham Sawigun, Philippe Coppejans, Carolina Mora Lopez:
A 0-to-35mA NMOS Capacitor-Less LDO with Dual-Loop Regulation Achieving 3ns Response Time and 1pF-to-10nF Loading Range. ESSCIRC 2023: 253-256
2010 – 2019
- 2018
- [j1]Lin-Kun Wu, David San Segundo Bello, Philippe Coppejans, Jan Craninckx, Andreas Süss, Maarten Rosmeulen, Piet Wambacq, Jonathan Borremans:
Analysis and Design of a CMOS Ultra-High-Speed Burst Mode Imager with In-Situ Storage Topology Featuring In-Pixel CDS Amplification. Sensors 18(11): 3683 (2018)
2000 – 2009
- 2003
- [c3]Philippe Coppejans, Michiel Steyaert:
Dynamic biasing: a low power linearisation technique. ESSCIRC 2003: 369-372 - 2002
- [c2]Peter J. Vancorenland, Philippe Coppejans, Wouter De Cock, Michiel Steyaert:
A quadrature direct digital downconverter. CICC 2002: 235-238 - [c1]Peter J. Vancorenland, Philippe Coppejans, Wouter De Cock, Paul Leroux, Michiel Steyaert:
Optimization of a fully integrated low power CMOS GPS receiver. ICCAD 2002: 305-308
Coauthor Index
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last updated on 2024-10-18 19:26 CEST by the dblp team
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