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ORCIDHitoshi Kitazawa
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2010 – 2019
- 2017
[j17]Shota Saito
, Yoichi Tomioka, Hitoshi Kitazawa:
A Theoretical Framework for Estimating False Acceptance Rate of PRNU-Based Camera Identification. IEEE Trans. Inf. Forensics Secur. 12(9): 2026-2035 (2017)- 2016
- [c23]Ning Li, Shunpei Takaki, Yoichi Tomioka, Hitoshi Kitazawa:
A multistage dataflow implementation of a Deep Convolutional Neural Network based on FPGA for high-speed object recognition. SSIAI 2016: 165-168 - 2015
- [j16]Tetsuya Okuda, Yoichi Tomioka, Hitoshi Kitazawa:
Robust Moving Object Extraction and Tracking Method Based on Matching Position Constraints. IEICE Trans. Inf. Syst. 98-D(8): 1571-1579 (2015) - [c22]Yutaro Ishigaki, Ning Li, Yoichi Tomioka, Akihiko Miyazaki, Hitoshi Kitazawa:
An FPGA-Based Accelerator for the 2D Implicit FDM and Its Application to Heat Conduction Simulations (Abstract Only). FPGA 2015: 266 - [c21]Ryota Takasu, Yoichi Tomioka, Takashi Aoki, Hitoshi Kitazawa:
An FPGA Implementation of Multi-stream Tracking Hardware using 2D SIMD Array (Abstract Only). FPGA 2015: 268 - [c20]Yutaro Ishigaki, Yoichi Tomioka, Tsugumichi Shibata, Hitoshi Kitazawa:
An FPGA implementation of 3D numerical simulations on a 2D SIMD array processor. ISCAS 2015: 938-941 - 2014
- [j15]Yoichi Tomioka, Ryota Takasu, Takashi Aoki, Eiichi Hosoya, Hitoshi Kitazawa:
FPGA Implementation of Exclusive Block Matching for Robust Moving Object Extraction and Tracking. IEICE Trans. Inf. Syst. 97-D(3): 573-582 (2014) - [j14]Ryota Takasu, Yoichi Tomioka, Yutaro Ishigaki, Ning Li, Tsugumichi Shibata, Mamoru Nakanishi, Hitoshi Kitazawa:
An FPGA Implementation of the Two-Dimensional FDTD Method and Its Performance Comparison with GPGPU. IEICE Trans. Electron. 97-C(7): 697-706 (2014) - [j13]Yoichi Tomioka, Hikaru Murakami, Hitoshi Kitazawa:
Sunshine-Change-Tolerant Moving Object Masking for Realizing both Privacy Protection and Video Surveillance. IEICE Trans. Inf. Syst. 97-D(9): 2483-2492 (2014) - [c19]Sumitaka Ogino, Yoichi Tomioka, Hitoshi Kitazawa:
Patrol course planning and battery station placement for mobile surveillance cameras. ICME 2014: 1-6 - 2013
- [j12]Zhu Li, Yoichi Tomioka, Hitoshi Kitazawa:
Extraction and Tracking Moving Objects in Detail Considering Visual Feature Constraint and Structure Constraint. IEICE Trans. Inf. Syst. 96-D(5): 1171-1181 (2013) - [j11]Yoichi Tomioka, Yuya Ito, Hitoshi Kitazawa:
Robust Digital Camera Identification Based on Pairwise Magnitude Relations of Clustered Sensor Pattern Noise. IEEE Trans. Inf. Forensics Secur. 8(12): 1986-1995 (2013) - [c18]Yoichi Tomioka, Hitoshi Kitazawa:
Collaborative patrol planning of mobile surveillance cameras for perfect observation of moving objects. ICME 2013: 1-6 - 2012
- [j10]Zhu Li, Kojiro Tomotsune, Yoichi Tomioka, Hitoshi Kitazawa:
Template Matching Method Based on Visual Feature Constraint and Structure Constraint. IEICE Trans. Inf. Syst. 95-D(8): 2105-2115 (2012) - [j9]Yoichi Tomioka, Atsushi Takara, Hitoshi Kitazawa:
Generation of an Optimum Patrol Course for Mobile Surveillance Camera. IEEE Trans. Circuits Syst. Video Technol. 22(2): 216-224 (2012) - 2011
- [c17]Yoichi Tomioka, Atsushi Takara, Hitoshi Kitazawa:
Enhanced patrol course planning method for multiple mobile surveillance cameras. ICDSC 2011: 1-6 - [c16]Yoichi Tomioka, Hitoshi Kitazawa:
Digital camera identification based on the clustered pattern noise of image sensors. ICME 2011: 1-4 - 2010
- [j8]Zhu Li, Kenichi Yabuta, Hitoshi Kitazawa:
Exclusive Block Matching for Moving Object Extraction and Tracking. IEICE Trans. Inf. Syst. 93-D(5): 1263-1271 (2010) - [c15]Zhu Li, Yoichi Tomioka, Hitoshi Kitazawa:
Motion estimation based on iterative color matching and structure matching. APCCAS 2010: 136-139 - [c14]Yoichi Tomioka, Atsushi Takara, Hitoshi Kitazawa:
Travelling route of mobile surveillance camera. APCCAS 2010: 1043-1046
2000 – 2009
- 2009
- [j7]Kenichi Yabuta, Hitoshi Kitazawa, Toshihisa Tanaka:
Privacy Protection by Masking Moving Objects for Security Cameras. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(3): 919-927 (2009) - [c13]Kazuya Matsushita, Hitoshi Kitazawa:
An improved camera identification method based on the texture complexity and the image restoration. ICHIT 2009: 171-175 - [c12]Zhu Li, Kenichi Yabuta, Hitoshi Kitazawa:
A New Method for Moving Object Extraction and Tracking Based on the Exclusive Block Matching. PSIVT 2009: 249-260 - 2008
- [c11]Jun Umezawa, Hitoshi Kitazawa:
A vision sensor with background subtraction processor using mixed analog-digital architecture. APCCAS 2008: 65-68 - [c10]Kenichi Yabuta, Hitoshi Kitazawa:
Optimum camera placement considering camera specification for security monitoring. ISCAS 2008: 2114-2117 - 2006
- [j6]Hidenori Sato, Hiroto Matsuoka, Hitoshi Kitazawa, Akira Onozawa:
Image-Based Photorealistic 3D Reconstruction Using Hexagonal Representation. Inf. Media Technol. 1(1): 275-284 (2006) - [c9]Kenichi Yabuta, Hitoshi Kitazawa, Toshihisa Tanaka:
A new concept of real-time security camera monitoring with privacy protection by masking moving objects. Real-Time Image Processing 2006: 60630L - 2005
- [c8]Kenichi Yabuta, Hitoshi Kitazawa, Toshihisa Tanaka:
A New Concept of Security Camera Monitoring with Privacy Protection by Masking Moving Objects. PCM (1) 2005: 831-842 - 2002
- [j5]Hiroto Matsuoka, Tatsuto Takeuchi, Hitoshi Kitazawa, Akira Onozawa:
Representation of Pseudo Inter-reflection and Transparency by Considering Characteristics of Human Vision. Comput. Graph. Forum 21(3): 503-509 (2002) - [c7]Hidenori Sato, Hiroto Matsuoka, Akira Onozawa, Hitoshi Kitazawa:
Hexagonal Image Representation for 3-D Photorealistic Reconstruction. ICPR (2) 2002: 672-676 - 2000
- [c6]Ikuo Harada, Hidenori Sato, Hitoshi Kitazawa:
Optimizing Network 3D Data Transmissions for Interactive Applications. PG 2000: 419-420
1990 – 1999
- 1997
- [c5]Yuichiro Takei, Akira Onozawa, Kenji Kawai, Hitoshi Kitazawa:
An Efficient Paired-net Routing Algorithm for High-speed Bipolar LSIs. Great Lakes Symposium on VLSI 1997: 2-7 - 1995
- [c4]Akira Onozawa, Hitoshi Kitazawa, Kenji Kawai:
Post-layout optimization of power and timing for ECL LSIs. ED&TC 1995: 167-172 - 1994
- [c3]Ikuo Harada, Hitoshi Kitazawa:
A Global Router Optimizing Timing and Area for High-Speed Bipolar LSI's. DAC 1994: 177-181 - 1990
- [c2]Ikuo Harada, Hitoshi Kitazawa, Takao Kaneko:
A Routing System for Mixed A/D Standard Cell LSIs. ICCAD 1990: 378-381
1980 – 1989
- 1987
- [j4]Kazuhiro Ueda, Hitoshi Kitazawa, Tohru Adachi, Ikuo Harada:
Top-Down Layout for Hierarchical Custom Design. IEEE Des. Test 4(6): 22-29 (1987) - [j3]Takumi Watanabe, Hitoshi Kitazawa, Yoshi Sugiyama:
A Parallel Adaptable Routing Algorithm and its Implementation on a Two-Dimensional Array Processor. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6(2): 241-250 (1987) - 1985
- [j2]Osamu Karatsu, Tamio Hoshino, Makoto Endo, Hitoshi Kitazawa, Tohru Adachi, Kazuhiro Ueda:
An Integrated Design Automation System for VLSI Circuits. IEEE Des. Test 2(5): 17-26 (1985) - [j1]Kazuhiro Ueda, Hitoshi Kitazawa, Ikuo Harada:
CHAMP: Chip Floor Plan for Hierarchical VLSI Layout Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 4(1): 12-22 (1985) - 1982
- [c1]Tohru Adachi, Hitoshi Kitazawa, Mitsuyoshi Nagatani, Tsuneta Sudo:
Hierarchical top-down layout design method for VLSI chip. DAC 1982: 785-791
Coauthor Index
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