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2020 – today
- 2023
[i1]Paolo D'Alberto, Abhishek Kumar Jain, Ismail Bustany, Henri Fraisse, Mansimran Benipal:
Entropy Maximization in Sparse Matrix by Vector Multiplication (maxESpMV). CoRR abs/2308.00106 (2023)- 2020
- [j1]Henri Fraisse
, Mathias Lé, David Thesmar:
The Real Effects of Bank Capital Requirements. Manag. Sci. 66(1): 5-23 (2020) - [c7]Abhishek Kumar Jain, Hossein Omidian, Henri Fraisse, Mansimran Benipal, Lisa Liu, Dinesh Gaitonde:
A Domain-Specific Architecture for Accelerating Sparse Matrix Vector Multiplication on FPGAs. FPL 2020: 127-132
2010 – 2019
- 2018
- [c6]Henri Fraisse, Dinesh Gaitonde:
A SAT-based Timing Driven Place and Route Flow for Critical Soft IP. FPL 2018: 8-15 - [c5]Chirag Ravishankar, Henri Fraisse, Dinesh Gaitonde:
SAT Based Place-And-Route for High-Speed Designs on 2.5D FPGAs. FPT 2018: 118-125 - 2016
- [c4]Henri Fraisse, Abhishek Joshi, Dinesh Gaitonde, Alireza Kaviani:
Boolean Satisfiability-Based Routing and Its Application to Xilinx UltraScale Clock Network. FPGA 2016: 74-79 - [c3]Ilya Ganusov, Henri Fraisse, Aaron Ng, Rafael Trapani Possignolo, Sabya Das:
Automated extra pipeline analysis of applications mapped to Xilinx UltraScale+ FPGAs. FPL 2016: 1-10 - 2015
- [c2]Elias Vansteenkiste, Alireza Kaviani, Henri Fraisse:
Analyzing the divide between FPGA academic and commercial results. FPT 2015: 96-103
1990 – 1999
- 1993
- [c1]Olivier Coudert, Jean Christophe Madre, Henri Fraisse:
A New Viewpoint on Two-Level Logic Minimization. DAC 1993: 625-630
Coauthor Index
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