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ORCIDNaushad Alam
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2020 – today
- 2024
[c17]Naushad Alam
, Yvette Graham, Cathal Gurrin:
Memento 4.0: A Prototype Conversational Search System for LSC'24. LSC@ICMR 2024: 82-87- 2023
- [j13]Ly-Duyen Tran, Manh-Duy Nguyen, Duc-Tien Dang-Nguyen, Silvan Heller, Florian Spiess, Jakub Lokoc, Ladislav Peska, Thao-Nhu Nguyen, Omar Shahbaz Khan, Aaron Duane, Björn Þór Jónsson, Luca Rossetto, An-Zi Yen, Ahmed Alateeq, Naushad Alam, Minh-Triet Tran, Graham Healy, Klaus Schoeffmann, Cathal Gurrin:
Comparing Interactive Retrieval Approaches at the Lifelog Search Challenge 2021. IEEE Access 11: 30982-30995 (2023) - [j12]Naushad Alam, Yvette Graham:
Memento: a prototype search engine for LSC 2021. Multim. Tools Appl. 82(24): 37807-37828 (2023) - [c16]Naushad Alam, Yvette Graham, Cathal Gurrin:
Memento 3.0: An Enhanced Lifelog Search Engine for LSC'23. LSC@ICMR 2023: 41-46 - 2022
- [c15]Ly-Duyen Tran, Naushad Alam, Yvette Graham, Linh Khanh Vo, Nghiem Tuong Diep, Binh T. Nguyen, Liting Zhou, Cathal Gurrin:
An Exploration into the Benefits of the CLIP model for Lifelog Retrieval. CBMI 2022: 15-22 - [c14]Naushad Alam, Yvette Graham, Cathal Gurrin:
Memento 2.0: An Improved Lifelog Search Engine for LSC'22. LSC@ICMR 2022: 2-7 - 2021
- [c13]Naushad Alam, Yvette Graham, Cathal Gurrin:
Memento: A Prototype Lifelog Search Engine for LSC'21. LSC@ICMR 2021: 53-58 - [c12]Sayeed Ahmad, Naushad Alam, Mohd. Hasan:
Radiation Hardened Area-Efficient 10T SRAM Cell for Space Applications. VDAT 2021: 1-6 - 2020
- [j11]Syed Afzal Ahmad, Naushad Alam:
Suppression of ambipolarity in tunnel-FETs using gate oxide as parameter: analysis and investigation. IET Circuits Devices Syst. 14(3): 288-293 (2020) - [j10]Mohd Adil Raushan, Naushad Alam, Mohd Jawaid Siddiqui:
Design approach to improve the performance of JAMFETs. IET Circuits Devices Syst. 14(3): 333-339 (2020) - [j9]Mohd Yasir, Naushad Alam:
Design of CNTFET-Based CCII Using gm/ID Technique for Low-Voltage and Low-Power Applications. J. Circuits Syst. Comput. 29(9): 2050143:1-2050143:20 (2020) - [c11]Salwa Yasmeen Neyaz, Itisha Saxena, Naushad Alam, Syed Atiqur Rahman:
FPGA and ASIC Implementation and Comparison of Multipliers. ISDCS 2020: 1-4
2010 – 2019
- 2019
- [j8]Ahmed Shaban, Sayeed Ahmad, Naushad Alam, Mohd. Hasan:
Compact and Low Power 11T-2MTJ Non-Volatile Ternary Content Addressable Memory Cell with High Sense Margin. J. Low Power Electron. 15(2): 193-203 (2019) - [c10]Mohd Adil Raushan, Naushad Alam, Mohd Jawaid Siddiqui:
Pocket engineered electrostatically doped tunnel field effect transistor. TENCON 2019: 1842-1845 - 2018
- [c9]Ahmed Shaban, Sayeed Ahmad, Naushad Alam, Mohd. Hasan:
Compact and Reliable Low Power Non-Volatile TCAM Cell. ISED 2018: 100-104 - [c8]Arvind Kumar Sharma, Naushad Alam, Anand Bulusu:
UTBB FD-SOI Circuit Design using Multifinger Transistors: A Circuit-Device Interaction Perspective. PRIME 2018: 57-60 - 2017
- [j7]Sayeed Ahmad, Mohit Kumar Gupta, Naushad Alam, Mohd. Hasan:
Low Leakage Single Bitline 9 T (SB9T) Static Random Access Memory. Microelectron. J. 62: 1-11 (2017) - 2016
- [j6]Baljit Kaur, Arvind Kumar Sharma, Naushad Alam, S. K. Manhas, Bulusu Anand:
A variation aware timing model for a 2-input NAND gate and its use in sub-65 nm CMOS standard cell characterization. Microelectron. J. 53: 45-55 (2016) - [j5]Sayeed Ahmad, Mohit Kumar Gupta, Naushad Alam, Mohd. Hasan:
Single-Ended Schmitt-Trigger-Based Robust Low-Power SRAM Cell. IEEE Trans. Very Large Scale Integr. Syst. 24(8): 2634-2642 (2016) - 2015
- [c7]Arvind Kumar Sharma, Neeraj Mishra, Naushad Alam, Sudeb Dasgupta, Anand Bulusu:
Pre-layout estimation of performance and design of basic analog circuits in stress enabled technologies. VDAT 2015: 1-6 - 2014
- [j4]Naushad Alam, Bulusu Anand, Sudeb Dasgupta:
An Analytical Delay Model for Mechanical Stress Induced Systematic Variability Analysis in Nanoscale Circuit Design. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(6): 1714-1726 (2014) - [j3]Baljit Kaur, Naushad Alam, S. K. Manhas, Bulusu Anand:
Efficient ECSM Characterization Considering Voltage, Temperature, and Mechanical Stress Variability. IEEE Trans. Circuits Syst. I Regul. Pap. 61-I(12): 3407-3415 (2014) - [c6]Mohammad Shueb Romi, Naushad Alam, Mohd Yusuf Yasin:
An analytical delay model for CMOS Inverter-Transmission Gate structure. VDAT 2014: 1-6 - 2013
- [j2]Naushad Alam, Bulusu Anand, Sudeb Dasgupta:
The impact of process-induced mechanical stress on CMOS buffer design using multi-fingered devices. Microelectron. Reliab. 53(3): 379-385 (2013) - [j1]Naushad Alam, Bulusu Anand, Sudeb Dasgupta:
The impact of process-induced mechanical stress in narrow width devices and variable-taper CMOS buffer design. Microelectron. Reliab. 53(5): 718-724 (2013) - 2012
- [c5]Naushad Alam, Bulusu Anand, Sudeb Dasgupta:
The Impact of Process-Induced Mechanical Stress in Narrow Width Devices and Circuit Design Issues. ISED 2012: 213-215 - [c4]Naushad Alam, Bulusu Anand, Sudeb Dasgupta:
Process induced mechanical stress aware poly-pitch optimization for enhanced circuit performance. ISQED 2012: 717-722 - [c3]Naushad Alam, Bulusu Anand, Sudeb Dasgupta:
Impact of Dummy Poly on the Process-Induced Mechanical Stress Enhanced Circuit Performance. VDAT 2012: 357-359
2000 – 2009
- 2009
- [c2]Naushad Alam, Abdul Kadir Kureshi, Mohd. Hasan, Tughrul Arslan:
Carbon Nanotube Interconnects for Low-power High-speed Applications. ISCAS 2009: 2273-2276 - [c1]Abdul Kadir Kureshi, Naushad Alam, Mohd. Hasan, Tughrul Arslan:
Subthreshold Deep Submicron Performance Investigation of CMOS and DTCMOS Biasing Schemes for Reconfigurable Computing. ISCAS 2009: 2545-2548
Coauthor Index
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