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2020 – today
- 2021
[c16]Thomas William Brown, Georgios C. Dogiamis
, Yi-Shin Yeh, Diego Correas-Serrano, Triveni S. Rane, Surej Ravikumar, Jessica C. Chou, Vijaya B. Neeli, Jose Mauricio Marulanda, Neelam Prabhu Gaunkar, Cho-Ying Lu, Iwen Huang, Ram Sadhwani, Hyung-Jin Lee, Hariprasad Chandrakumar, Jeffery W. Bates, Zinia Tuli, Qiang Yu, Mario Weiss, Jag Rangaswamy, Carlos F. Nieva, Dimitri Frolov, Telesphor Kamgaing, Ye Seul Nam, Henning Braunisch, Said Rami:
A 50 Gbps 134 GHz 16 QAM 3 m Dielectric Waveguide Transceiver System Implemented in 22nm CMOS. VLSI Circuits 2021: 1-2- 2020
- [j4]Jeroen Petrus Gerardus van Dijk, Bishnu Patra, Sushil Subramanian, Xiao Xue, Nodar Samkharadze, Andrea Corna, Charles Jeon, Farhana Sheikh, Esdras Juarez Hernandez, Brando Perez Esparza, Huzaifa Rampurawala, Brent R. Carlton, Surej Ravikumar, Carlos Nieva, Sungwon Kim, Hyung-Jin Lee, Amir Sammak, Giordano Scappucci, Menno Veldhorst, Lieven M. K. Vandersypen, Edoardo Charbon, Stefano Pellerano, Masoud Babaie, Fabio Sebastiano:
A Scalable Cryo-CMOS Controller for the Wideband Frequency-Multiplexed Control of Spin Qubits and Transmons. IEEE J. Solid State Circuits 55(11): 2930-2946 (2020) - [c15]Hyung-Jin Lee, Steven Callender, Said Rami, Woorim Shin, Qiang Yu, Jose Mauricio Marulanda:
Intel 22nm Low-Power FinFET (22FFL) Process Technology for 5G and Beyond. CICC 2020: 1-7 - [c14]Hyung-Jin Lee, Ravi Mahajan, Farhana Sheikh, Ramune Nagisetty, Manish Deo:
Multi-die Integration Using Advanced Packaging Technologies. CICC 2020: 1-7 - [c13]Bishnu Patra, Jeroen P. G. van Dijk, Sushil Subramanian, Andrea Corna, Xiao Xue, Charles Jeon, Farhana Sheikh, Esdras Juarez Hernandez, Brando Perez Esparza, Huzaifa Rampurawala, Brent R. Carlton, Nodar Samkharadze, Surej Ravikumar, Carlos Nieva, Sungwon Kim, Hyung-Jin Lee, Amir Sammak, Giordano Scappucci, Menno Veldhorst, Lieven M. K. Vandersypen, Masoud Babaie, Fabio Sebastiano, Edoardo Charbon, Stefano Pellerano:
19.1 A Scalable Cryo-CMOS 2-to-20GHz Digitally Intensive Controller for 4×32 Frequency Multiplexed Spin Qubits/Transmons in 22nm FinFET Technology for Quantum Computers. ISSCC 2020: 304-306
2010 – 2019
- 2019
- [i2]Dmitri E. Nikonov, P. Kurahashi, J. S. Ayers, Hyung-Jin Lee, Y. Fan, Ian A. Young:
Convolution Inference via Synchronization of a Coupled CMOS Oscillator Array. CoRR abs/1910.11802 (2019) - [i1]Dmitri E. Nikonov, P. Kurahashi, J. S. Ayers, Hyung-Jin Lee, Y. Fan, Ian A. Young:
A Coupled CMOS Oscillator Array for 8ns and 55pJ Inference in Convolutional Neural Networks. CoRR abs/1910.11803 (2019) - 2018
- [c12]Steven Callender, Woorim Shin, Hyung-Jin Lee, Stefano Pellerano, Christopher D. Hull:
FinFET for mm Wave - Technology and Circuit Design Challenges. BCICTS 2018: 168-173 - [c11]Cho-Ying Lu, Surej Ravikumar, Amruta D. Sali, Matthias Eberlein, Hyung-Jin Lee:
An 8b subthreshold hybrid thermal sensor with ±1.07°C inaccuracy and single-element remote-sensing technique in 22nm FinFET. ISSCC 2018: 318-320 - 2013
- [j3]Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Khoa Minh Nguyen, Hyung-Jin Lee, Ashoke Ravi, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst, Stefano Pellerano, Tong Kim, Satish Venkatesan, Durgesh Srivastava, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Sunder Ramamurthy, Raj Yavatkar, Krishnamurthy Soumyanath:
A 32 nm SoC With Dual Core ATOM Processor and RF WiFi Transceiver. IEEE J. Solid State Circuits 48(1): 91-103 (2013) - 2012
- [c10]Hasnain Lakdawala, Mark Schaecher, Chang-Tsung Fu, Rahul Dilip Limaye, Jon Duster, Yulin Tan, Ajay Balankutty, Erkan Alpman, Chun C. Lee, Satoshi Suzuki, Brent R. Carlton, Hyung Seok Kim, Marian Verhelst, Stefano Pellerano, Tong Kim, Durgesh Srivastava, Satish Venkatesan, Hyung-Jin Lee, Peter Vandervoorn, Jad Rizk, Chia-Hong Jan, Krishnamurthy Soumyanath, Sunder Ramamurthy:
32nm x86 OS-compliant PC on-chip with dual-core Atom® processor and RF WiFi transceiver. ISSCC 2012: 62-64 - [c9]Nathaniel J. August, Hyung-Jin Lee, Martin Vandepas, Rachael J. Parker:
A TDC-less ADPLL with 200-to-3200MHz range and 3mW power dissipation for mobile SoC clocking in 22nm CMOS. ISSCC 2012: 246-248 - 2011
- [c8]Hyung-Jin Lee, Alexandra M. Kern, Sami Hyvonen, Ian A. Young:
A scalable sub-1.2mW 300MHz-to-1.5GHz host-clock PLL for system-on-chip in 32nm CMOS. ISSCC 2011: 96-97
2000 – 2009
- 2009
- [j2]Jae-Ung Yun, Hyung-Jin Lee, Anjan Kumar Paul, Joong-Hwan Baek:
Face detection for video summary using illumination-compensation and morphological processing. Pattern Recognit. Lett. 30(9): 856-860 (2009) - 2007
- [j1]Nathaniel J. August, Hyung-Jin Lee, Dong Sam Ha:
Enabling Distributed Medium Access Control for Impulse-Based Ultrawideband Radios. IEEE Trans. Veh. Technol. 56(3): 1064-1075 (2007) - [c7]Mohammad Khairul Islam, Hyung-Jin Lee, Anjan Kumar Paul, Joong-Hwan Baek:
Content-Based Music Retrieval Using Beat Information. FSKD (3) 2007: 317-321 - [c6]Jae-Ung Yun, Hyung-Jin Lee, Anjan Kumar Paul, Joong-Hwan Baek:
Robust Face Detection for Video Summary Using Illumination-Compensation and Morphological Processing. ICNC (2) 2007: 710-714 - 2006
- [c5]Hyung-Jin Lee, Dong S. Ha, Sang S. Choi:
A 3 to 5GHz CMOS UWB LNA with input matching using miller effect. ISSCC 2006: 731-740 - 2005
- [c4]Woo Cheol Chung, Dong Sam Ha, Hyung-Jin Lee:
Dual use of power lines for data communications in a system-on-chip environment. ISCAS (4) 2005: 3355-3358 - [c3]Hyung-Jin Lee, Dong Sam Ha, Sangsung Choi:
A systematic approach to CMOS low noise amplifier design for ultrawideband applications. ISCAS (4) 2005: 3962-3965 - [c2]Sajay Jose, Hyung-Jin Lee, Dong Sam Ha, Sangsung Choi:
A low-power CMOS power amplifier for ultra wideband (UWB) applications. ISCAS (5) 2005: 5111-5114 - 2003
- [c1]Hyung-Jin Lee, Dong Sam Ha:
Frequency Domain Approach for CMOS Ultra-Wideband Radios. ISVLSI 2003: 236-237
Coauthor Index
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