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ORCIDHung Sen Huang
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2010 – 2019
- 2016
[j2]Jiangfeng Wu, Giuseppe Cusmai, Acer Wei-Te Chou, Tao Wang, Bo Shen, Vijayaramalingam Periasamy, Ming-Hung Hsieh, Chun-Ying Chen, Lin He, Loke Kun Tan, Aravind Padyana, Vincent Cheng-Hsun Yang, Gregory Unruh, Jackie Koon Lun Wong, Bryan Juo-Jung Hung, Massimo Brandolini, Maco Sha-Ting Lin, Xi Chen, Yen Ding, Yen-Jen Ko, Young J. Shin, Ada Hing T. Hung, Binning Chen, Cynthia Dang, Deepak Lakshminarasimhan, Iris Hong Liu, Jerry Lin, Kowen Lai, Larry Wassermann, Ayaskant Shrivastava, Chi-Ming Hsiao, Chun-Sheng Huang, Jianlong Chen, Lakshminarasimhan Krishnan, Ning-Yi Wang, Pin-En Su, Tianwei Li, Wei-Ta Shih, Yau-Cheng Yang, Peter Cangiane, Randall Perlow, William Ngai, Hanson Hung-Sen Huang, James Y. C. Chang, Xicheng Jiang, Ardie G. Venes, Ramon Ray Gomez:
A 2.7 mW/Channel 48-1000 MHz Direct Sampling Full-Band Cable Receiver. IEEE J. Solid State Circuits 51(4): 845-859 (2016)- [c4]Jiangfeng Wu, Acer Wei-Te Chou, Tianwei Li, Rong Wu, Tao Wang, Giuseppe Cusmai, Sha-Ting Lin, Cheng-Hsun Yang, Greg Unruh, Sunny Raj Dommaraju, Mo M. Zhang, Po Tang Yang, Wei-Ting Lin, Xi Chen, Dongsoo Koh, Qingqi Dou, Hemasundar Mohan Geddada, Juo-Jung Hung, Massimo Brandolini, Young Shin, Hung Sen Huang, Chun-Ying Chen, Ardie G. Venes:
27.6 A 4GS/s 13b pipelined ADC with capacitor and amplifier sharing in 16nm CMOS. ISSCC 2016: 466-467 - 2015
- [j1]Massimo Brandolini, Young Shin, Karthik Raviprakash, Tao Wang, Rong Wu, Hemasundar Mohan Geddada, Yen-Jen Ko, Yen Ding, Chun-Sheng Huang, Wei-Ta Shih, Ming-Hung Hsieh, Wei-Te Chou, Tianwei Li, Ayaskant Shrivastava, Yi-Chun Chen, Bryan Juo-Jung Hung, Giuseppe Cusmai, Jiangfeng Wu, Mo M. Zhang, Yuan Yao, Greg Unruh, Ardie G. Venes, Hung Sen Huang, Chun-Ying Chen:
A 5 GS/s 150 mW 10 b SHA-Less Pipelined/SAR Hybrid ADC for Direct-Sampling Systems in 28 nm CMOS. IEEE J. Solid State Circuits 50(12): 2922-2934 (2015) - [c3]Massimo Brandolini, Young Shin, Karthik Raviprakash, Tao Wang, Rong Wu, Hemasundar Mohan Geddada, Yen-Jen Ko, Yen Ding, Chun-Sheng Huang, Wei-Ta Shih, Ming-Hung Hsieh, Wei-Te Chou, Tianwei Li, Ayaskant Shrivastava, Yi-Chun Chen, Juo-Jung Hung, Giuseppe Cusmai, Jiangfeng Wu, Mo M. Zhang, Greg Unruh, Ardie G. Venes, Hung Sen Huang, Chun-Ying Chen:
26.6 A 5GS/S 150mW 10b SHA-less pipelined/SAR hybrid ADC in 28nm CMOS. ISSCC 2015: 1-3 - [c2]Jiangfeng Wu, Giuseppe Cusmai, Acer Wei-Te Chou, Tao Wang, Bo Shen, Vijayaramalingam Periasamy, Ming-Hung Hsieh, Chun-Ying Chen, Lin He, Loke Tan, Aravind Padyana, Cheng-Hsun Yang, Gregory Unruh, Jackie Koon Lun Wong, Juo-Jung Hung, Massimo Brandolini, Sha-Ting Lin, Xi Chen, Yen Ding, Yen-Jen Ko, Young Shin, Ada Hing T. Hung, Binning Chen, Cynthia Dang, Deepak Lakshminarasimhan, Iris Hong Liu, Jerry Lin, Kowen Lai, Larry Wassermann, Ayaskant Shrivastava, Chi-Ming Hsiao, Chun-Sheng Huang, Jianlong Chen, Lakshminarasimhan Krishnan, Ning-Yi Wang, Pin-En Su, Tianwei Li, Wei-Ta Shih, Yau-Cheng Yang, Peter Cangiane, Randall Perlow, William Ngai, Hung Sen Huang, James Y. C. Chang, Xicheng Jiang, Ardie G. Venes, Ramon Gomez:
A 2.7mW/Channel 48-to-1000MHz Direct Sampling Full-Band Cable Receiver. VLSIC 2015: 214- - 2012
- [c1]Xicheng Jiang, Min-Gyu Kim, Felix Cheung, Fang Lin, Hui Zheng, Jianlong Chen, Alex Jianzhong Chen, Darwin Cheung, Khaled Abdelfattah, Seong-Ho Lee, Hanson Hung-Sen Huang, Kishore Kasichainula, Yonghua Cong, Jiangfeng Wu, Chang-Hyeon Lee, George Chih, Yun Tu, Todd Brooks, Edison Jiang, Hongwei Kong, Chaoyang Zhao, Mustafa Keskin:
A 40 nm CMOS analog front end with enhanced audio for HSPA/EDGE multimedia applications. ESSCIRC 2012: 414-417
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