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Je-Kwang Cho
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2020 – today
- 2020
- [j9]Je-Kwang Cho, Minsu Jeong:
A Low-Voltage-Driven High-Voltage SRAM Pixel Circuit for Power Reduction in a Digital Micro-Display Panel. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. 67-I(5): 1640-1652 (2020)
2010 – 2019
- 2019
- [j8]Je-Kwang Cho, Minsu Jeong:
A Low-Power Digital Pixel Driving Scheme for Single-Pulse-PWM-Based Display Using AND-Embedded Pixel Circuits. IEEE Trans. Circuits Syst. Video Technol. 29(11): 3382-3392 (2019) - 2017
- [j7]Je-Kwang Cho:
A 2.24-mW, 61.8-dB SNDR, 20-MS/s Pipelined ADC With Charge-Pump-Based Dynamic Biasing for Power Reduction in Op Amp Sharing. IEEE Trans. Circuits Syst. I Regul. Pap. 64-I(6): 1368-1379 (2017) - [j6]Je-Kwang Cho:
A 92-dB DR, 24.3-mW, 1.25-MHz BW Sigma-Delta Modulator Using Dynamically Biased Op Amp Sharing. IEEE Trans. Very Large Scale Integr. Syst. 25(3): 881-893 (2017) - [j5]Hyuk Ryu, Eun-Taek Sung, Sangyong Park, Je-Kwang Cho, Donghyun Baek:
Fast Automatic Frequency Calibrator Using an Adaptive Frequency Search Algorithm. IEEE Trans. Very Large Scale Integr. Syst. 25(4): 1490-1496 (2017) - [j4]Je-Kwang Cho, Sunsik Woo:
A 6-mW, 70.1-dB SNDR, and 20-MHz BW Continuous-Time Sigma-Delta Modulator Using Low-Noise High-Linearity Feedback DAC. IEEE Trans. Very Large Scale Integr. Syst. 25(5): 1742-1755 (2017) - 2016
- [j3]Sunsik Woo, Je-Kwang Cho:
A Switched-Capacitor Filter With Reduced Sensitivity to Reference Noise for Audio-Band Sigma-Delta D/A Converters. IEEE Trans. Circuits Syst. II Express Briefs 63-II(4): 361-365 (2016) - 2014
- [j2]Je-Kwang Cho:
Low-power sigma-delta modulator with half-sample delayed-input feedforward. IEICE Electron. Express 11(24): 20141058 (2014)
2000 – 2009
- 2004
- [j1]Han-Il Lee, Je-Kwang Cho, Kun-Seok Lee, In-Chul Hwang, Tae-Won Ahn, Kyung-Suc Nah, Byeong-Ha Park:
A Σ-Δ fractional-N frequency synthesizer using a wide-band integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA applications. IEEE J. Solid State Circuits 39(7): 1164-1169 (2004) - 2003
- [c2]Je-Kwang Cho, Han-Il Lee, Kyung-Suc Nah, Byeong-Ha Park:
A 2-GHz wide band low phase noise voltage-controlled oscillator with on-chip LC tank. CICC 2003: 559-562 - [c1]Han-Il Lee, Je-Kwang Cho, Kun-Seok Lee, In-Chul Hwang, Tae-Won Ahn, Kyung-Suc Nah, Byeong-Ha Park:
A Σ-Δ fractional-N frequency synthesizer using a wideband integrated VCO and a fast AFC technique for GSM/GPRS/WCDMA applications. ESSCIRC 2003: 97-100
Coauthor Index
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