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ORCIDHagen Sämrow
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2010 – 2019
- 2012
[c6]Hagen Sämrow, Claas Cornelius, Philipp Gorski, Andreas Tockhorn, Dirk Timmermann
:
Selective redundancy to improve reliability and to slow down delay degradation due to gate oxide breakdown. DDECS 2012: 12-15- [c5]Hagen Sämrow, Claas Cornelius, Philipp Gorski, Jakob Salzmann, Dirk Timmermann:
Effiziente Simulation von Gateoxiddefekten auf Gatterebene mit Transistorlevel-Genauigkeit. MBMV 2012: 157-168 - 2011
- [c4]Hagen Sämrow, Claas Cornelius, Philipp Gorski, Jakob Salzmann, Andreas Tockhorn, Dirk Timmermann:
Functional enhancements of TMR for power efficient and error resilient ASIC designs. DDECS 2011: 183-188 - 2010
- [c3]Andreas Tockhorn, Claas Cornelius, Hagen Sämrow, Dirk Timmermann:
Modeling temperature distribution in Networks-on-Chip using RC-circuits. DDECS 2010: 229-232
2000 – 2009
- 2009
- [c2]Hagen Sämrow, Claas Cornelius, Frank Sill, Andreas Tockhorn, Dirk Timmermann:
Twin logic gates: improved logic reliability by redundancy concerning gate oxide breakdown. SBCCI 2009 - 2008
- [c1]Claas Cornelius, Frank Sill, Hagen Sämrow, Jakob Salzmann, Dirk Timmermann, Diógenes Cecilio da Silva Jr.:
Encountering gate oxide breakdown with shadow transistors to increase reliability. SBCCI 2008: 111-116
Coauthor Index
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